An application made for this job — a tailored resume and cover letter that speak straight to the posting.
Neuralink is seeking a Digital IC Design Engineer in California to deliver RTL and micro-architecture for high‑throughput, low‑power DSPs and accelerators enabling brain‑machine interfaces. You will work on IPs, on‑chip buses, video/audio/AI accelerators, and collaborate with firmware teams.
Required: a BS in EE/CS, 5+ years in digital design, and proficiency in SystemVerilog, C/C++, Python. Experience with RTL, architecture, and complex digital systems is essential for this role.
Neuralink is seeking a Digital IC Design Engineer in California to deliver RTL and micro-architecture for high‑throughput, low‑power DSPs and accelerators enabling brain‑machine interfaces. You will work on IPs, on‑chip buses, video/audio/AI accelerators, and collaborate with firmware teams.
Required: a BS in EE/CS, 5+ years in digital design, and proficiency in SystemVerilog, C/C++, Python. Experience with RTL, architecture, and complex digital systems is essential for this role.