Digital IC Design Intern for Next-Gen Brain Interfaces

Neuralink

South San Francisco (CA)

In loco

USD 39.778 - 56.653

Tempo pieno

14 giorni+

Una candidatura completa in un minuto

Curriculum e lettera di presentazione personalizzati, pronti da inviare.

Supera i filtri ATS

Vantaggi offerti da questo lavoro

Medical insurance
Dental insurance
Vision insurance
Meal provided
RSUs
401(k)
Paid holidays
Parental leave
Flexible time off

Descrizione del lavoro

Neuralink in California is seeking a Digital IC Design Engineer Intern to contribute to micro-architecture design and RTL implementation of low-power accelerators and SoC components for next-generation brain-computer interfaces.

You will collaborate with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team, tackling energy efficiency, performance, and verification challenges on silicon bring-up.

Competenze

  • Evidence of exceptional ability in electrical engineering, computer science, or computer engineering.
  • 2+ years of experience in digital design.
  • Proficient in SystemVerilog, C/C++, Python.
  • Experience in designing digital signal processing pipelines, from algorithm to RTL.

Mansioni

  • Micro-architecture design and RTL implementation of low-power general-purpose hardware accelerators.
  • Low-power GPUs and serial link MAC/PHY designs.
  • Interface hardware/software with firmware engineers.
  • Architecture optimization balancing energy, performance, and process variation.
  • Collaborate with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team.

Conoscenze

SystemVerilog
C/C++
Python
RTL design

Strumenti

EDA tools

Descrizione del lavoro

Neuralink in California is seeking a Digital IC Design Engineer Intern to contribute to micro-architecture design and RTL implementation of low-power accelerators and SoC components for next-generation brain-computer interfaces.

You will collaborate with chip designers, electrical engineers, algorithms engineers, and software engineers on a small, agile team, tackling energy efficiency, performance, and verification challenges on silicon bring-up.

Ottieni la revisione del curriculum gratis e riservata.

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