Digital Design Engineer

Cirrus Logic; Chandler (AZ); On-site; USD 85,000 - 115,000; Full time

Job summary

A leading mixed-signal processing company in Chandler, Arizona is seeking a Digital Design Engineer to join their collaborative team. The role involves designing and implementing digital subsystems for mixed-signal ICs using Verilog, and requires relevant education along with 2+ years of experience for Bachelor's candidates. Familiarity with digital design flows and strong analytical skills are essential. The position supports various stages of product development, ensuring successful integration between digital and analog components.

Qualifications

• Bachelor's with 2+ years of relevant digital IC design experience.
• Strong working knowledge of Verilog RTL design.
• Experience designing and verifying complex state machines.

Responsibilities

• Design and implement digital subsystems and IP blocks for mixed-signal ICs.
• Develop RTL designs using Verilog.
• Perform functional and integration verification.

Skills

Verilog RTL design

Digital design flow

Problem-solving skills

Team collaboration

Education

Bachelor's degree in Electrical Engineering or related field

Master's degree in Electrical Engineering or related field

Tools

MATLAB

Simulink

Job description

About the Role

Cirrus Logic has been propelled by the top engineers in mixed‑signal processing for over four decades. As a Digital Design Engineer, you will be part of a collaborative, cross‑functional team developing high‑performance mixed‑signal integrated circuits used by leading consumer, industrial, audio, power, and embedded‑system manufacturers. You will contribute to the design of system‑on‑chip (SoC) devices, digital signal processing blocks, and digital control logic that interface with high‑performance ADCs, DACs, amplifiers, and power‑management circuitry, implemented in advanced CMOS technologies. You will play a key role in bringing digital subsystems from concept to production silicon, working closely with analog, verification, layout, and test teams to deliver robust, manufacturable designs.

Responsibilities

• Design and implement digital subsystems and IP blocks for mixed‑signal ICs from architecture through tape‑out.
• Develop RTL designs using Verilog and support integration into larger SoC environments.
• Design and verify DSP, control, and datapath logic, including calibration and monitoring state machines.
• Perform functional verification, integration verification, and support UVM‑based verification teams.
• Contribute to behavioral and system modeling of digital and mixed‑signal systems.
• Support post‑silicon validation, characterization, and production test, including lab bring‑up and silicon debug.
• Collaborate across disciplines to ensure correct interaction between digital logic and analog circuitry.
• Participate in design reviews, tape‑out readiness, and root‑cause analysis for silicon or system issues.

Required Knowledge, Skills, and Experience

• Degree in Electrical Engineering, Computer Engineering, or a related technical field
  • Bachelor's with 2+ years of relevant digital IC design experience.
  • Master's with 0+ years of relevant experience.
• Strong working knowledge of Verilog RTL design.
• Solid understanding of the digital design flow, including:
  • Microarchitecture and RTL development.
  • Clock and reset domain crossing.
  • Functional verification.
  • Timing constraints and synthesis.
• Experience designing and verifying complex state machines and control logic.
• Familiarity with CMOS VLSI design fundamentals.
• Strong analytical, problem‑solving, and communication skills.
• Ability to work effectively in a team‑based, fast‑paced development environment.

Preferred Knowledge, Skills, and Experience

• Expertise or strong background in Digital Signal Processing (DSP).
• Experience implementing FIR and IIR filters and other signal‑processing algorithms.
• Familiarity with ARM‑based SoCs, microprocessor subsystems, buses, and peripherals.
• Experience with mixed‑signal IC development, including interaction between digital and analog circuitry.
• Exposure to low‑power and high‑performance ASIC design techniques.
• Experience with backend flows, including synthesis, place & route, and timing analysis.
• Experience generating test vectors and supporting production or probe test environments.
• Proficiency with MATLAB, Simulink, or similar tools for modeling, algorithm development, and validation.
• Strong lab and silicon validation skills, including silicon debug and characterization.

Equal Employment Opportunity

Employment decisions are made on the basis of job‑related criteria without regard to race, color, religion, sex, national origin, age, protected veteran or disabled status, genetic information, or any other classification protected by applicable law.