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Broadcom in San Jose, CA seeks an experienced design verification engineer with a proven track record in setting up UVM-based testbenches for large designs. The role spans from initial specification through timing closure and hand-off to physical design, with strong cross‑functional collaboration.
Requirements include a BSEE and 5+ years in SoC integration and test bench setup. The package features a discretionary annual bonus, equity awards, and Broadcom's comprehensive benefits.
The ideal candidate has a proven track record of working on setting up testbenches for Design Verification using UVM on large designs.
Responsibilities include:
Experience:
Compensation and Benefits
The annual base salary range for this position is USD 101,000.00 To USD 162,000.00
As a valued member of our team, you'll be eligible for a discretionary annual bonus and the opportunity to receive not only a competitive new hire equity grant, but also annual equity awards, connecting your success directly to the company's growth. All subject to relevant plan documents and award agreements.
Broadcom offers a competitive and comprehensive benefits package: Medical, dental and vision plans, 401(K) participation including company matching, Employee Stock Purchase Program (ESPP), Employee Assistance Program (EAP), company paid holidays, paid sick leave and vacation time. The company follows all applicable laws for Paid Family Leave and other leaves of absence.
Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.