Design Verification Engineer — Fast-Paced DV for GPUs/SoCs

Tachyum; Las Vegas (NV); On-site; USD 100,000 - 140,000; Full time

Benefits offered by this job

Competitive salary

Benefits package

Professional development

International environment

Bleeding edge tech

Collaborative culture

Job summary

Tachyum is seeking talented Verification Engineers to expand our International Design Verification team in Las Vegas. The role focuses on verification environments, testbenches, and regression for complex hardware designs.

You will work on FPGA emulated platforms, use SystemVerilog and UVM, and collaborate with a Linux toolchain. Excellent communication and a drive to innovate in a fast-paced setting are essential.

Qualifications

• Bachelor’s or Master’s degree in Electrical or Computer Science.
• 4 years of Design Verification experience.
• Strong understanding of DV goals and challenges.
• Able to thrive in a start-up, fast-paced environment.
• Excellent communication skills.
• Strong SystemVerilog and UVM knowledge.
• Ability to identify failure modes when others are complacent.

Responsibilities

• Verify complex test scenarios on FPGA-emulated platforms.
• Develop and maintain verification environments and tests.
• Collaborate with Linux-based toolchains and Git workflows.
• Contribute to regression, coverage, and formal verification.
• Participate in verification for PCIe and DDR protocols.

Skills

SystemVerilog

UVM

Testbench development

C/C++ programming

Debugging

Education

Bachelor’s or Master’s in Electrical or Computer Science

Tools

Jasper

ACL2

Git

Job description

Tachyum is seeking talented Verification Engineers to expand our International Design Verification team in Las Vegas. The role focuses on verification environments, testbenches, and regression for complex hardware designs.

You will work on FPGA emulated platforms, use SystemVerilog and UVM, and collaborate with a Linux toolchain. Excellent communication and a drive to innovate in a fast-paced setting are essential.