Design Verification Engineer

Sintegra Inc.; Sunnyvale (CA); On-site; USD 100,000 - 130,000; Full time

Job summary

A leading company in semiconductor manufacturing is seeking a skilled Design Verification Engineer to develop and execute verification plans for complex digital designs. The ideal candidate will work on-site in San Jose, California, and collaborate with cross-functional teams to ensure high-quality standards in design verification. This role requires hands-on experience with verification tools and a strong understanding of digital design principles.

Qualifications

• Experience with SOC development companies preferred.
• Strong understanding of digital design principles.

Responsibilities

• Develop and execute verification plans for complex digital designs.
• Collaborate with design engineers for effective debugging.

Skills

Problem Solving

Collaboration

Communication

Education

Bachelor's or Master's degree in Electrical Engineering

Tools

UVM

SystemVerilog

Job description

We are seeking a highly skilled Design Verification Engineer. The ideal candidate will have a background in working with companies that develop SOC. This position requires working on-site for one of our clients in San Jose, California.

Responsibilities:

1. Develop and execute verification plans for complex digital designs.
2. Create and maintain verification environments using industry-standard tools and methodologies.
3. Implement and debug test-benches and simulation environments.
4. Perform thorough verification of RTL designs, identifying and resolving discrepancies.
5. Collaborate closely with design engineers to ensure comprehensive coverage and effective debugging.
6. Work with cross-functional teams to integrate verification efforts with overall design and development processes.
7. Participate in code and design reviews to ensure the highest quality standards.
8. Document verification plans, processes, and results, providing clear communication to stakeholders.

Requirements:

1. Bachelor's or Master's degree in Electrical Engineering, Computer Engineering, or related field.
2. Hands-on experience with verification tools such as UVM, SystemVerilog, and related EDA tools.
3. Background in working with SOC development companies is highly preferred.
4. Strong understanding of digital design principles and verification methodologies.
5. Excellent problem-solving skills and attention to detail.
6. Ability to work effectively in a collaborative team environment.
7. Strong communication skills, both verbal and written.

Additional Information:

• Seniority level: Mid-Senior level
• Employment type: Full-time
• Industry: Semiconductor Manufacturing