Design Verification Engineer

Experis; Santa Clara (CA); On-site; USD 100,000 - 150,000; Full time

Job summary

An established industry player is on the lookout for a Design Verification Engineer to enhance their verification team. This role involves developing and maintaining tests for functional verification, collaborating with experts to debug design defects, and working on cutting-edge projects that shape the future of technology. Join a collaborative and innovative environment where you can engage with advanced processor architecture and industry-leading technologies. If you're passionate about making a difference in the tech landscape, this opportunity is perfect for you.

Benefits

Medical, dental, vision plans

Health Savings and Flexible Spending Accounts

Dependent Care FSA

Supplemental Life Insurance

Disability Insurance

Business Travel Insurance

401(k) with match

Weekly pay

Qualifications

• 10+ years of ASIC design verification experience.
• Experience with functional verification tests and debugging.

Responsibilities

• Develop and maintain tests for functional verification.
• Collaborate with engineers to resolve design defects.

Skills

C/C++ programming

Verilog

SystemVerilog

UVM verification libraries

Analytical skills

Communication skills

Collaborative spirit

Scripting languages (Python, Perl, TCL)

Job description

Our client, a leader in the technology industry, is seeking a Design Verification Engineer to join their team. As a Design Verification Engineer, you will support the engineering department's verification team. The ideal candidate will have strong analytical skills, excellent communication, and a collaborative spirit.

What’s the Job?

1. Develop and maintain tests for functional verification.
2. Build directed and random verification tests, debug failures, and collaborate with RTL and firmware engineers to resolve design defects.
3. Work on functional and code coverage verification.
4. Provide technical support to other teams.
5. Collaborate with architects, hardware, and firmware engineers to understand new features to verify.

What’s Needed?

1. Experience with C/C++ programming.
2. Proficiency in Verilog, SystemVerilog, and verification libraries like UVM.
3. 10+ years of ASIC design verification experience.
4. Background with DDR or Memory Controller; PHY verification is a plus.
5. Familiarity with scripting languages like Python, Perl, and TCL is a plus.

What’s in it for me?

1. Opportunity to work on industry-leading technologies.
2. Collaborative and innovative environment.
3. Engagement with a team of engineering experts.
4. Enhance skills in advanced processor architecture.
5. Participate in cutting-edge projects shaping the future of technology.

Additional Benefits

• Medical, dental, vision plans
• Health Savings and Flexible Spending Accounts
• Dependent Care FSA
• Supplemental Life Insurance
• Disability Insurance
• Business Travel Insurance
• 401(k) with match
• Weekly pay

If interested, click 'Apply Now' to connect with a recruiter. We look forward to speaking with you!