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InfoObjects Inc. in San Jose, CA is seeking a Design Verification Engineer for 100% onsite work. The role focuses on developing and maintaining UVM/SystemVerilog testbenches for high-performance IPs including compute arrays, DMAs, NoCs, and memory subsystems.
Face-to-face interviews are mandatory and 8+ years of ASIC experience are required. You will drive regression, triage, and coverage closure, report progress to customers, and collaborate with Amazon toolchains in a startup-like environment
Location : San Jose CA (100% Onsite)
We are seeking a Design Verification Engineer with exposure on Developing and maintaining UVM/System Verilog testbenches for high-performance IPs (compute arrays, DMAs, NoCs, memory subsystems).