Design Verification Engineer

Nextgentechinc; San Jose (CA); On-site; USD 156,853 - 160,000; Full time

Job summary

A technology firm in San Jose is seeking a Design Verification Engineer to create and implement verification plans. The ideal candidate will have a Master's in Computer Science or a related field and at least one year of relevant experience. Responsibilities include collaborating with design teams, developing test cases, and driving verification processes to ensure product quality. The position offers a competitive salary range of $156,853 to $160,000 per year and requires some travel.

Qualifications

• Master’s degree in relevant field or foreign equivalent.
• 1 year of experience in related roles.
• Travel may be required (10-15%).

Responsibilities

• Collaborate with teams on product requirements.
• Create a comprehensive verification plan.
• Drive design verification to closure.
• Prepare reports on the verification process.

Skills

Verification strategies

Functional coverage

Code coverage

Test cases development

Education

Master’s in Computer Science or related field

Tools

System Verilog

Job description

Nextgen Technologies Inc., has openings for Design Verification Engineer in San Jose, CA:

Job Title: Design Verification Engineer

Job Duration: 40 Hours / Week, Permanent position, Full time

Job Duties: Collaborate with design and development teams to understand product requirements and specifications. Create a comprehensive verification plan detailing the strategies, methodologies, and tools for verifying the design. Develop standards and guidelines to ensure design quality and performance. Drive design verification to closure based on defined verification metrics, including the test plan, functional coverage, and code coverage. Define, maintain, and execute unit-level and/or cluster-level verification test plans. Design and implement test benches with test cases, stimulus, and monitors to verify the design's behavior and functionality. Work closely with architects to communicate verification progress, issues, and potential improvements. Create and write test cases to validate the design's features, functions, and robustness. Develop and drive continuous design verification improvements using the latest verification methodologies, tools, and industry technologies to detect bugs, glitches, or deviations. Review the architecture and micro-architecture specifications. Maintain efficient and clean regression status and drive functional and code coverage to closure. Generate and run test cases on logic simulation models. Code functional coverage models and System Verilog assertions. Prepare comprehensive reports and documentation detailing the verification process, results, and any issues identified.

Job Requirements: Required Master’s or foreign equivalent in Computer Science, Computer Information Systems, Management Information Systems, Engineering (Any), or any related field + 1 year of experience in the job offered, Software Engineer, Project Engineer, Design Engineer or related. Travel may be required to various unanticipated client sites throughout the US. The frequency of travel will be 10-15%.

Salary Range: $156,853.00/Year to $160,000.00/Year

Location of Work: Nextgen Technologies Inc.
1735 North 1st Street, Suite #102
San Jose, CA 95112

To contact or to apply please send resumes to HR, Nextgen Technologies Inc., 1735 North 1^st Street, Suite #102, San Jose, CA 95112 or email: [e-mail].