Design Verification Engineer

HCLTech; Sunnyvale (CA); On-site; USD 92,000 - 141,000; Full time

Benefits offered by this job

Medical, dental, and vision insurance

401(k) retirement plan

10 days paid time off per year

10 paid holidays per year

Job summary

HCLTech in Sunnyvale, CA is seeking a Design Verification Engineer to advance high-performance ASICs and SoCs. In this crucial role, you'll develop test plans, build scalable verification environments, and ensure functional correctness.

The ideal candidate will have a Bachelor’s degree and over 3 years of experience in ASIC/SoC verification. Strong knowledge of System Verilog, UVM methodologies, and debugging skills are essential. This role offers competitive compensation and a range of benefits.

Qualifications

• 3+ years of industry experience in ASIC/SoC pre-silicon verification.
• Strong proficiency in System Verilog and Verilog.
• Exceptional analytical and debugging skills with a proven track record.

Responsibilities

• Design, develop, and maintain advanced verification environments using System Verilog and UVM.
• Collaborate with RTL designers to define verification strategies.
• Write directed and constrained-random tests and debug simulation failures.

Skills

System Verilog

Verilog

UVM

Problem Solving

Python

Perl

Education

Bachelor’s degree in Electrical Engineering, Computer Engineering, or related field

Tools

Synopsys VCS

Cadence Xcelium

Siemens Questa

Job description

HCLTech is looking for a highly talented and self- motivated Design Verification Engineer to join it in advancing the technological world through innovation and creativity.

Job REQ ID: 118963

Position Type: Full Time

We are seeking a highly motivated and skilled Silicon Design Verification Engineer to join our fast-paced Hardware Engineering team in Sunnyvale, CA. In this role, you will play a critical part in ensuring the functional correctness of our next-generation, high-performance ASICs and SoCs. You will work closely with architecture and RTL design teams to develop comprehensive test plans, build scalable verification environments, and drive the verification process from concept to tape-out. If you are passionate about solving complex hardware challenges and pushing the boundaries of silicon performance, we want you on our team.

Key Responsibilities

• Testbench Architecture: Design, develop, and maintain advanced, scalable verification environments and testbenches using SystemVerilog and UVM.
• Test Planning: Collaborate with RTL designers and hardware architects to define verification strategies and author comprehensive test plans for complex IP blocks and subsystems.
• Test Execution & Debug: Write directed and constrained-random tests. Triage and debug simulation failures, working directly with designers to root-cause and resolve RTL bugs.
• Coverage Closure: Define and analyze functional and code coverage metrics to ensure comprehensive verification of the design. Drive coverage closure to meet rigorous tape-out milestones.
• Flow & Tool Automation: Develop and maintain automation scripts (Python, Perl, Bash) to streamline simulation, regressions, and reporting flows.
• Verification Methodologies: Participate in the evaluation and adoption of new verification methodologies, formal verification techniques, and EDA tools.
• Gate-Level Simulation: Assist in running and debugging gate-level simulations (GLS) with and without timing constraints (SDF).

Minimum Qualifications

• Education: Bachelor’s degree in electrical engineering, Computer Engineering, Computer Science, or a related field.
• Experience: 3+ years of industry experience in ASIC/SoC pre-silicon verification.
• Hardware Languages: Strong proficiency in System Verilog and Verilog.
• Methodologies: Hands-on experience with UVM, OVM, or VMM methodologies.
• Problem Solving: Exceptional analytical and debugging skills with a proven track record of finding complex bugs in RTL designs.
• Scripting: Proficiency in at least one scripting language (Python, Perl, Makefile, or Bash).
• EDA Tools: Experience with industry-standard simulation and debug tools (e.g., Synopsys VCS, Cadence Xcelium, or Siemens Questa).

Preferred Qualifications

• Advanced Degree: Master’s degree or Ph.D. in Electrical/Computer Engineering.
• Protocol Knowledge: Familiarity with standard interfaces and protocols (e.g., PCIe, CXL, DDR/LPDDR, Ethernet, AMBA AXI/AHB).
• Formal Verification: Experience using formal verification tools (e.g., JasperGold, VC Formal) to mathematically prove design properties.
• Emulation/FPGA: Experience with hardware emulation platforms (e.g., Palladium, Zebu) or FPGA prototyping.
• Power Aware Verification: Knowledge of UPF/CPF and experience with power-aware simulation techniques

Pay and Benefits

• Pay Range Minimum: $92000/annum
• Pay Range Maximum: $141000/annum

HCLTech is an equal opportunity employer, committed to providing equal employment opportunities to all applicants and employees regardless of race, religion, sex, color, age, national origin, pregnancy, sexual orientation, physical disability or genetic information, military or veteran status, or any other protected classification, in accordance with federal, state, and/or local law. Should any applicant have concerns about discrimination in the hiring process, they should provide a detailed report of those concerns to [e-mail] for investigation.

A candidate’s pay within the range will depend on their skills, experience, education, and other factors permitted by law. This role may also be eligible for performance-based bonuses subject to company policies. In addition, this role is eligible for the following benefits subject to company policies: medical, dental, vision, pharmacy, life, accidental death & dismemberment, and disability insurance; employee assistance program; 401(k) retirement plan; 10 days of paid time off per year (some positions are eligible for need-based leave with no designated number of leave days per year); and 10 paid holidays per year

How You’ll Grow

At HCLTech, we offer continuous opportunities for you to find your spark and grow with us. We want you to be happy and satisfied with your role and to really learn what type of work sparks your brilliance the best. Throughout your time with us, we offer transparent communication with senior-level employees, learning and career development programs at every level, and opportunities to experiment in different roles or even pivot industries. We believe that you should be in control of your career with unlimited opportunities to find the role that fits you best