Design-for-Test Engineer: RTL/DFT Verification Pro

Apple, Inc.; Cupertino (CA); On-site; USD 208,000 - 225,000; Full time

Benefits offered by this job

Medical and dental coverage

Retirement benefits

Employee stock purchase plan

Tuition reimbursement

Relocation assistance

Job summary

Apple Inc. in Cupertino, California, seeks a senior hardware verification engineer to set up and generate project collaterals, review design specifications, and verify RTL at scan and emulation levels.

This role focuses on bug triage, regression automation, and proficiency in SystemVerilog with Verdi/DVE. Apple offers comprehensive benefits, stock programs, education support, and relocation assistance.

Qualifications

• Master’s degree in Electrical Engineering or related field with 4 years of experience.
• Experience with bug triage using JIRA or Radar to drive issues to closure.
• Verifying DF T functions including scan and core-level testing; waveform analysis in Synopsys Verdi.
• Knowledge of computer architecture (pipelining, caching, memory management) for verification strategies.
• Proficiency in SystemVerilog and Verilog with constrained-random stimulus and assertion-based verification.
• Automation of verification using scripting languages (Perl, Python, Tcl) to set up simulations and generate test configurations.
• Familiar with Hardware Design Specification and RTL Code Analysis to understand designs and create verification plans.
• Experience in advanced failure triage and debugging using waveform viewers (Verdi, DVE).
• Knowledge of DFT principles (scan chains, ATPG) to verify scan dumps vs simulations.

Responsibilities

• Set up and generate collaterals for each project.
• Review design specifications with designers.
• Perform RTL scan dump verification, tests, and emulation-level checks.
• Verify scan dumps and PAGATE verification.
• Identify bugs and remediate with design teams.
• Support other teams with post-design verification issues.

Skills

Bug triage & resolution

SystemVerilog/Verilog

DFT verification

Scripting automation

RTL code analysis

Waveform debugging

Computer architecture

Regression automation

Education

Master's degree in Electrical Engineering or related field

Tools

JIRA

Radar

Synopsys Verdi

DVE

Python

Perl

Tcl

Job description

Apple Inc. in Cupertino, California, seeks a senior hardware verification engineer to set up and generate project collaterals, review design specifications, and verify RTL at scan and emulation levels.

This role focuses on bug triage, regression automation, and proficiency in SystemVerilog with Verdi/DVE. Apple offers comprehensive benefits, stock programs, education support, and relocation assistance.