Design for Test Engineer

Apple, Inc.; Cupertino (CA); On-site; USD 208,000 - 225,000; Full time

Benefits offered by this job

Medical and dental coverage

Retirement benefits

Employee stock purchase plan

Tuition reimbursement

Relocation assistance

Job summary

Apple Inc. in Cupertino, California, seeks a senior hardware verification engineer to set up and generate project collaterals, review design specifications, and verify RTL at scan and emulation levels.

This role focuses on bug triage, regression automation, and proficiency in SystemVerilog with Verdi/DVE. Apple offers comprehensive benefits, stock programs, education support, and relocation assistance.

Qualifications

• Master’s degree in Electrical Engineering or related field with 4 years of experience.
• Experience with bug triage using JIRA or Radar to drive issues to closure.
• Verifying DF T functions including scan and core-level testing; waveform analysis in Synopsys Verdi.
• Knowledge of computer architecture (pipelining, caching, memory management) for verification strategies.
• Proficiency in SystemVerilog and Verilog with constrained-random stimulus and assertion-based verification.
• Automation of verification using scripting languages (Perl, Python, Tcl) to set up simulations and generate test configurations.
• Familiar with Hardware Design Specification and RTL Code Analysis to understand designs and create verification plans.
• Experience in advanced failure triage and debugging using waveform viewers (Verdi, DVE).
• Knowledge of DFT principles (scan chains, ATPG) to verify scan dumps vs simulations.

Responsibilities

• Set up and generate collaterals for each project.
• Review design specifications with designers.
• Perform RTL scan dump verification, tests, and emulation-level checks.
• Verify scan dumps and PAGATE verification.
• Identify bugs and remediate with design teams.
• Support other teams with post-design verification issues.

Skills

Bug triage & resolution

SystemVerilog/Verilog

DFT verification

Scripting automation

RTL code analysis

Waveform debugging

Computer architecture

Regression automation

Education

Master's degree in Electrical Engineering or related field

Tools

JIRA

Radar

Synopsys Verdi

DVE

Python

Perl

Tcl

Job description

Cupertino, California, United States Hardware

Imagine what you can do here. Apple is a place where extraordinary people gather to do their lives best work. Together we create products and experiences people once couldn't have imagined, and now, can't imagine living without. It's the diversity of those people and their ideas that inspires the innovation that runs through everything we do.

Description

APPLE INC has the following available in Cupertino, California and various unanticipated locations throughout the USA. Set up and generate the collaterals for each projects. Conduct document specification review of the design with designer. Conduct scan dump verification first on RTL level for assigned projects. Verify scan dump for all the projects assigned. Conduct emulation level verification for assigned projects. Conduct PAGATE level verification for all assigned projects. Identify bugs and remediate by collaborating with designers. Support other teams with issues arising following the end of design verification. 40 hours/week. At Apple, base pay is one part of our total compensation package and is determined within a range. This provides the opportunity to progress as you grow and develop within a role. The base pay range for this role is between $207,673 - $225,300/yr and your base pay will depend on your skills, qualifications, experience, and location.PAY & BENEFITS: Apple employees also have the opportunity to become an Apple shareholder through participation in Apple’s discretionary employee stock programs. Apple employees are eligible for discretionary restricted stock unit awards, and can purchase Apple stock at a discount if voluntarily participating in Apple’s Employee Stock Purchase Plan. You’ll also receive benefits including: Comprehensive medical and dental coverage, retirement benefits, a range of discounted products and free services, and for formal education related to advancing your career at Apple, reimbursement for certain educational expenses — including tuition. Additionally, this role might be eligible for discretionary bonuses or commission payments as well as relocation. Learn more about Apple Benefits: https://www.apple.com/careers/us/benefits.html.Note: Apple benefit, compensation and employee stock programs are subject to eligibility requirements and other terms of the applicable plan or program.

Minimum Qualifications

• Master’s degree or foreign equivalent in Electrical Engineering or related field and 4 years of experience in the job offered or related occupation.
• Experience and/or education must include:
• Utilizing experience in Bug Triage and Resolution Management using formal bug tracking system (e.g., JIRA or Radar) to file detailed bug reports, track issue status, and drive problems to closure by following up and collaborating with design and other relevant teams.
• Verifying advanced Design for Test (DFT) functions, including scan and core level testing. Performed scan testing and waveform analysis in Synopsys Verdi using a developed model.
• Leveraged knowledge of computer architecture, including pipelining, caching, and memory management, to develop effective verification strategies.
• Leveraged the advanced features of SystemVerilog, such as constrained-random stimulus generation and assertion-based verification, in conjunction with Verilog to ensure robust design verification.
• Utilizing Verification Automation using scripting languages (e.g., Perl, Python, Tcl) to automate the setup of simulation environments, generate test configurations, parse log files, and create regression management scripts to generate project collaterals.
• Utilizing experience in Hardware Design Specification and RTL Code Analysis to understand complex hardware design documents and corresponding RTL code (SystemVerilog/Verilog) and to conduct specification reviews, create comprehensive verification plans, and identify potential flaws in the design architecture.
• Utilizing experience in Advanced Failure Triage and Debug using advanced waveform viewers and debug tools (e.g., Verdi or DVE) to trace test failures back to their root cause in the source code or netlist, to find bugs and provide actionable debug information to design teams.
• Applying a working knowledge of DFT principles, such as scan chains and ATPG patterns, to effectively verify scan dumps, debug mismatches between DFT reports and simulation results, and bridge the gap between pre-silicon verification and post-silicon testing.

Preferred Qualifications

• N/A

This position is not subject to the application limits.

Apple is an equal opportunity employer that is committed to inclusion and diversity. We seek to promote equal opportunity for all applicants without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or other legally protected characteristics. Learn more about your EEO rights as an applicant

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