Design Automation & Library Characterization Lead

Solidigm; San Jose (CA); On-site; USD 121,280 - 194,100; Full time

Benefits offered by this job

RSU program

Medical, dental, vision

Job summary

Solidigm seeks a Design Automation / Library Characterization Engineer to lead standard cell library flows, automation, and QA infrastructure. You will bridge library development with synthesis and timing signoff, and enable DFE flows with frontend teams for robust RTL-to-GDSII delivery.

Ideal candidates have 5+ years in characterization and DA flow development, strong scripting, and hands-on experience with Synopsys and Cadence toolchains.

Qualifications

• MS in Electrical Engineering or related field
• 5+ years of experience in standard cell library characterization and validation
• 5+ years of experience in design automation and EDA flow development
• Hands-on experience with digital frontend flows, including synthesis and STA
• Strong scripting proficiency in Python, Perl, Tcl, and Bash
• Experience with Cadence and Synopsys toolchains (Virtuoso, Conformal, Siliconsmart, Fusion Compiler, Design Compiler, PrimeTime)

Responsibilities

• Lead end-to-end standard cell library characterization and release flows
• Develop and enhance DA automation frameworks
• Drive library QA and validation infrastructure
• Support Digital Frontend enablement for synthesis and STA
• Enable multi-release and cross-version comparisons
• Support PnR and full-chip integration flows
• Improve ECO and design closure productivity
• Partner cross-functionally with RTL, frontend, backend, PDK, and CAD teams

Skills

Standard cell characterization

EDA flow development

Digital frontend flows

Python scripting

Scripting: Perl/Tcl/Bash

Education

MS in Electrical Engineering

Tools

Synopsys tools: Siliconsmart, Fusion Compiler, Design Compiler, PrimeTime

Cadence tools: Virtuoso, Conformal

Job description

Solidigm seeks a Design Automation / Library Characterization Engineer to lead standard cell library flows, automation, and QA infrastructure. You will bridge library development with synthesis and timing signoff, and enable DFE flows with frontend teams for robust RTL-to-GDSII delivery.

Ideal candidates have 5+ years in characterization and DA flow development, strong scripting, and hands-on experience with Synopsys and Cadence toolchains.