CPU Timing Engineer: Automation & STA Signoff

QUALCOMM, Inc.; Santa Clara (CA); Hybride; USD 199 000 - 298 000; Plein temps

Avantages offerts par ce poste

Annual bonus

RSU grants

Benefits package

Résumé du poste

Qualcomm Technologies, Inc. is seeking a CPU Physical Design Timing Engineer to define, develop and drive CPU timing closure for Oryon CPU Cores.

You will collaborate with RTL teams to meet aggressive power, area and performance targets using industry standard tools. You will script and automate STA signoff workflows with TCL/Perl/Python, run PrimeTime/Tempus, and investigate timing miscorrelations across PVT conditions, contributing to multi-project PPA goals and professional growth in a

Qualifications

• Bachelor's degree in Electrical or Computer Engineering or related field.
• Strong STA timing analysis basics and CTS/POCV concepts.
• Hands-on experience with PrimeTime/Tempus and scripting skills.
• Knowledge of ASIC back-end flows and tools (ICC2, Innovus).

Responsabilités

• STA setup, convergence, reviews and signoff for multi-mode designs.
• Timing analysis across multiple PVT conditions and design levels.
• Run PrimeTime/Tempus for STA flow optimization and correlation.
• Investigate timing miscorrelation and propose fixes.

Connaissances

Automation scripting

STA timing analysis

Primetime/Tempus experience

CPU timing concepts

Formation

Bachelor's degree in Electrical Engineering / Computer Engineering / Computer Science or related field

Master's degree in Electrical Engineering / Computer Engineering / Computer Science or related field

Outils

PrimeTime

Tempus

ICC2

Innovus

Description du poste

Qualcomm Technologies, Inc. is seeking a CPU Physical Design Timing Engineer to define, develop and drive CPU timing closure for Oryon CPU Cores.

You will collaborate with RTL teams to meet aggressive power, area and performance targets using industry standard tools. You will script and automate STA signoff workflows with TCL/Perl/Python, run PrimeTime/Tempus, and investigate timing miscorrelations across PVT conditions, contributing to multi-project PPA goals and professional growth in a