CPU Core DFT Engineer – ATPG/MBIST Specialist | Hybrid

Socket.dev; Santa Clara (CA); Hybrid; USD 140,000 - 210,000; Full time

Job summary

AMD is seeking a senior DFT engineer to own ATPG/DFT for the next generation of high-performance cores in Santa Clara, CA. You will partner with architecture, IP design, and Physical Design teams to deliver first-pass silicon success.

You will debug complex test patterns, drive DFT improvements, and contribute to post-silicon verification while working in a Linux-rich environment with scripting in Perl/Tcl. This hybrid role emphasizes ownership and cross-disciplinary collaboration.

Qualifications

• Bachelor's degree in Electrical Engineering or Computer Engineering or equivalent.
• Experience with DFT/ATPG, scan, and test methodologies.
• Ability to debug complex patterns and collaborate across teams.

Responsibilities

• Own ATPG/DFT responsibilities for next-gen AMD cores.
• Debug low coverage, DRC issues, and optimize test flows.
• Work with architecture, IP design, and Physical Design teams.
• Support silicon bring-up and post-silicon debugging.
• Proficient in Verilog and scripting in Linux environments.
• Communicate results clearly and present findings to stakeholders.
• Must be comfortable with hybrid work in Santa Clara, CA.

Skills

Strong communication

Ownership

Problem solving

Education

Bachelor's degree in Electrical Engineering or Computer Engineering

Master's degree preferred

Tools

Verilog

Linux

Perl

Tcl

Tessent

ATPG

JTAG

Job description

AMD is seeking a senior DFT engineer to own ATPG/DFT for the next generation of high-performance cores in Santa Clara, CA. You will partner with architecture, IP design, and Physical Design teams to deliver first-pass silicon success.

You will debug complex test patterns, drive DFT improvements, and contribute to post-silicon verification while working in a Linux-rich environment with scripting in Perl/Tcl. This hybrid role emphasizes ownership and cross-disciplinary collaboration.