Clocks Verification Engineer - Hybrid & Equity Opportunity

NVIDIA Corporation; Santa Clara (CA); Hybrid; USD 116,000 - 190,000; Full time

Job summary

NVIDIA Corporation is seeking an exceptional ASIC Clocks Verification Engineer to join the clocks group. You will collaborate with ASIC designers, verification engineers, and software teams to verify high-frequency clock structures for GPU designs.

The role requires a Master’s degree in Electrical Engineering, hands-on experience with SystemVerilog/UVM, and strong Python/Perl scripting skills. Base salary ranges from 116,000 USD to 189,750 USD, with equity and benefits.

Qualifications

• Master’s degree in Electrical Engineering (or equivalent).
• Experience with SystemVerilog and UVM.
• Experience in Design Verification, Logic Design and Logic Synthesis.
• Strong coding skills in Python, Perl, or similar scripting languages.

Responsibilities

• Verify high frequency clock structures with ASIC teams.
• Engage with multiple teams to satisfy architectural constraints.
• Deliver clock information to SOC verification, timing and DFT teams.
• Use Perl to improve productivity of clocking verification workflows.
• Collaborate with software and product groups to debug clock silicon bugs.
• Identify design improvements and propose new clocking efficiency methods.

Skills

Collaboration

Verification principles

Education

Master's degree in Electrical Engineering

Tools

SystemVerilog

UVM

Python

Perl

Design Verification

Logic Design

Logic Synthesis

Job description

NVIDIA Corporation is seeking an exceptional ASIC Clocks Verification Engineer to join the clocks group. You will collaborate with ASIC designers, verification engineers, and software teams to verify high-frequency clock structures for GPU designs.

The role requires a Master’s degree in Electrical Engineering, hands-on experience with SystemVerilog/UVM, and strong Python/Perl scripting skills. Base salary ranges from 116,000 USD to 189,750 USD, with equity and benefits.