ASIC Engineer, Power Management Design Verification

Meta Careers; Sunnyvale, Northern (CA, KY); Hybrid; USD 180,000 - 240,000; Full time

Job summary

Meta Careers in Sunnyvale, CA seeks a Staff ASIC Design Verification Engineer to define and lead verification strategy for custom silicon powering Meta's data center infrastructure.

You will architect UVM-based environments, drive coverage closures, and partner with design, emulation, and post-silicon validation teams to ensure first-pass silicon success across Meta's ASIC portfolio.

Qualifications

• Bachelor's degree in Computer Science, Computer Engineering, or equivalent practical experience.
• Experience with IP/SoC verification and coverage-based methodologies.
• Strong debugging and root-cause analysis skills.

Responsibilities

• Define and implement IP/SoC verification plans and test benches.
• Develop functional tests based on verification plans.
• Drive verification closure with defined metrics and coverage.
• Debug and root-cause functional failures in the design.
• Collaborate with design, model, emulation, and silicon validation teams to ensure quality.

Skills

Verification strategy

UVM verification

Debugging

Test bench development

Collaboration

Education

Bachelor's degree in Computer Science, Computer Engineering, or equivalent

Tools

UVM-based verification tooling

Emulation tooling

Job description

# ASIC Engineer, Power Management Design VerificationSunnyvale, CA+1 locationEngineering+ 3 moreApply nowMeta's Infrastructure Silicon team is seeking a Staff ASIC Design Verification Engineer to lead verification strategy and execution for custom silicon powering Meta's data center infrastructure. In this role, you will architect and drive end-to-end verification of complex IP blocks and SoCs designed for AI/ML acceleration, networking, and storage workloads. You will define scalable UVM-based verification environments, establish coverage closure methodologies, and partner with design, emulation, and post-silicon validation teams to ensure first-pass silicon success across Meta's infrastructure ASIC portfolio.---## ASIC Engineer, Power Management Design Verification Responsibilities* Define and implement IP/SoC verification plans, build verification test benches to enable IP/sub-system/SoC level verification* Develop functional tests based on the verification test plan* Drive design verification to closure based on defined verification metrics on the test plan, functional, and code coverage* Debug, root-cause and resolve functional failures in the design, partnering with the design team* Collaborate with cross-functional teams like Design, Model, Emulation, and silicon validation teams towards ensuring the highest design quality* Develop and drive continuous design verification improvements using the latest verification methodologies, tools, and technologies from the industry## Minimum Qualifications* Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience