ASIC Design Engineer – SoC Interconnect, Cache & Memory Systems

QUALCOMM, Inc.; San Diego (CA); On-site; USD 101,000 - 152,000; Full time

Job summary

Qualcomm Technologies, Inc. in San Diego seeks ASIC Design Engineers to contribute to architecture, microarchitecture, and RTL for high‑performance SoC interconnects and memory controllers.

You will work with architecture, verification, and physical design teams to deliver power‑efficient silicon across product cycles and collaborate on C/C++ modeling and RTL workflows. The role emphasizes design quality, timing closure, and cross‑functional collaboration in a fast-paced hardware environment

Qualifications

• Experience with Verilog/SystemVerilog RTL design.
• Background in Computer Architecture and ASIC design methodologies.
• Proficiency in C/C++ or Python programming for modeling and tooling.
• Strong analytical and communication skills.

Responsibilities

• Develop microarchitecture definitions and design specifications for complex SoC subsystems.
• Design, implement, and validate RTL for interconnects, cache controllers, memory subsystems, and DDR controllers.
• Collaborate with system architects to evaluate hardware feasibility of new features and performance requirements.
• Optimize designs for performance, power, area, timing, and scalability.
• Work with verification teams to develop test plans, review coverage, and debug issues.
• Support synthesis, timing closure, power analysis, gate-level simulations, and physical design activities.
• Participate in system-level integration and debugging throughout the product development cycle.
• Investigate and resolve pre-silicon and post-silicon issues.
• Contribute to C/C++ modeling, design methodologies, and process improvements.

Skills

Verilog/SystemVerilog

Computer Architecture

C/C++/Python programming

Digital logic design

Education

Bachelor's degree in Electrical/Computer Engineering or Computer Science

Tools

Synopsys synthesis tools

Job description

Company

Qualcomm Technologies, Inc.

Job Area

Engineering Group, Engineering Group > ASICS Engineering

General Summary

At Qualcomm, we believe in the power of technology. For decades, our innovations have transformed industries, improved billions of lives, and addressed some of society's greatest challenges. As a leading technology innovator, Qualcomm continues to push the boundaries of what's possible, enabling next-generation experiences and helping create a smarter, more connected future.

Team Overview

Our mission is to deliver industry-leading System-on-Chip (SoC) solutions that power smartphones, PCs, XR devices, automotive platforms, and emerging technologies. We are seeking talented ASIC Design Engineers to contribute to the architecture, microarchitecture, design, and deployment of next‑generation SoC Interconnects, Cache and Memory Subsystems, and High‑Speed DDR Memory Controllers.

In this role, you will work closely with architecture, verification, physical design, and software teams to develop high‑performance, power‑efficient silicon solutions that enable Qualcomm's most advanced products.

Responsibilities

• Develop microarchitecture definitions and design specifications for complex SoC subsystems.
• Design, implement, and validate RTL for SoC interconnects, cache controllers, memory subsystems, and DDR memory controller components.
• Collaborate with system architects to evaluate hardware feasibility of new features, algorithms, and performance requirements.
• Optimize designs for performance, power, area, timing, and scalability.
• Work closely with verification teams to develop test plans, review coverage, debug issues, and achieve design quality goals.
• Support synthesis, timing closure, power analysis, gate‑level simulations, and physical design activities.
• Participate in system‑level integration and debugging throughout the product development cycle.
• Investigate and resolve pre‑silicon and post‑silicon issues.
• Contribute to C/C++ modeling, design methodologies, and process improvements that enhance engineering productivity and design quality.
• Collaborate across cross‑functional teams to successfully deliver silicon for production.

Required Qualifications

• Bachelor's, Master's, or PhD in Electrical Engineering, Computer Engineering, Computer Science, or a related field.
• 0-4+ years of industry experience or relevant academic experience in ASIC/SoC design.
• Experience or coursework in: Verilog and/or SystemVerilog RTL design Computer Architecture ASIC design methodologies Digital logic design C, C++, and/or Python programming
• Strong analytical and problem‑solving skills.
• Excellent communication and collaboration skills.

Preferred Qualifications

• SoC interconnects and on‑chip communication fabrics
• Cache and memory subsystem design
• DDR/LPDDR memory controller architecture and design
• ARM or x86 processor architectures and bus protocols
• RTL development for CPUs, cache controllers, or memory controllers
• Low‑power design methodologies
• Functional verification and coverage‑driven verification techniques
• Synopsys synthesis tools and ASIC implementation flows
• Timing closure, physical design support, and power optimization
• Silicon bring‑up and post‑silicon debug

Minimum Qualifications

• Bachelor's degree in Science, Engineering, or related field.

Equity and Diversity statements

Qualcomm is an equal opportunity employer.

Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail disability‑[e-mail] or call Qualcomm's toll‑free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

Pay range and Other Compensation & Benefits

• $101,400.00 - $152,200.00
• We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales‑incentive plans are not eligible for our annual bonus).
• In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.