Next Gen, High-Speed, Memory and Cache Controller Design Engineer

QUALCOMM, Inc.; San Diego (CA); On-site; USD 101,000 - 152,000; Full time

Benefits offered by this job

Annual discretionary bonus

RSU grants

Benefits package

Job summary

Qualcomm Technologies, Inc. is seeking a Senior ASIC Design Engineer for next-generation high-speed memory controllers, interfacing with CPUs, GPUs, DSPs, and multimedia processors.

The role focuses on architecture, RTL coding, and deployment of high-speed memory systems in Qualcomm products. The candidate will work on memory controllers (LPDDR, HBM/DDR), NoC-based architectures, and cross-functional collaboration to deliver high-quality designs, with emphasis on timing, synthesis, and debug

Qualifications

• Bachelor's or Master's degree in Science, Engineering, or related field.
• Team welcomes recent graduates and 3+ years of experience.

Responsibilities

• Define, model, design (digital and/or analog), verify, validate, implement and document IP (block/SoC).
• Synthesize timing, perform physical design support, and debug designs.
• Collaborate with cross-functional teams to determine product execution path.

Skills

LPDDR memory

HBM memory

NoC architectures

x86/ARM CPU

RTL design

Education

Master's in Computer Engineering or Electrical Engineering

Bachelor's degree in Science, Engineering, or related field

Tools

Verilog/VHDL

Job description

Company:

Qualcomm Technologies, Inc.

Job Area:

Engineering Group, Engineering Group > ASICS Engineering

General Summary:

As a leading technology innovator, Qualcomm pushes the boundaries of what's possible to enable next-generation experiences and drives communication and data processing transformation to help create a smarter, connected future for all. As a Qualcomm ASIC Engineer, you will define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP (block/SoC) development for a variety of high performance, high quality, low power world class products. Qualcomm Engineers collaborate with cross-functional groups to determine product execution path.

Minimum Qualifications:

• Bachelor's degree in Science, Engineering, or related field.

Next Generation, High-Speed, Memory and Cache Controller Design Team is looking for a Senior ASIC Design Engineers for the next generation high speed HBM/LPDDR/DDR memory controller. The front end of the DDR controller interfaces to the rest of the system such as CPU, GPU, DSP, Multimedia Processors and the engineer is expected to be responsible for enabling high speed (1Ghz+) designs in QCT products.

The candidate will work on architecture, design (RTL coding), and deployment of the next generation, high-speed memory systems into QCT products. You will develop or contribute to the development of architecture and design specifications and drive the micro-architecture of portions of the logic design. You will implement and deliver RTL and work with verification engineers to deliver high quality designs. You will be responsible for debugging your designs and also provide debug support when integrated into the rest of the chip. Synthesis, Timing Closure, Physical Design Support, Gate Level Simulations, Power Analysis are expected to be key tasks. You will make regular contributions to the overall improvement in design methodology to drive productivity and quality of results.

Qualifications

• Bachelor's or Masters degree in Science, Engineering, or related field.
• The team welcomes applications from recent graduates as well as early-career professionals with 3+ years of experience.

Experience with the following:

• LPDDR memory and cache controller, NoC based architectures especially the front end interfacing to the CPU, DSP, and multimedia processors
• Exposure to HBM memory type designs
• On-chip tightly coupled SRAM & L3 cache controller architecture/design
• Experience with x86 or ARM CPU/bus architectures
• Ordering of memory transactions and methods to enforce proper ordering in order to conform to ISA architecture specification

Education Requirements

• Required: Master's, Computer Engineering and/or Electrical Engineering

Qualcomm is an equal opportunity employer. If you are an individual with a disability and need an accommodation during the application/hiring process, rest assured that Qualcomm is committed to providing an accessible process. You may e-mail [e-mail] or call Qualcomm's toll-free number found here. Upon request, Qualcomm will provide reasonable accommodations to support individuals with disabilities to be able participate in the hiring process. Qualcomm is also committed to making our workplace accessible for individuals with disabilities. (Keep in mind that this email address is used to provide reasonable accommodations for individuals with disabilities. We will not respond here to requests for updates on applications or resume inquiries).

EEO Employer: Qualcomm is an equal opportunity employer; all qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, gender identity, national origin, disability, Veteran status, or any other protected classification.

Qualcomm expects its employees to abide by all applicable policies and procedures, including but not limited to security and other requirements regarding protection of Company confidential information and other confidential and/or proprietary information, to the extent those requirements are permissible under applicable law.

Pay range and Other Compensation & Benefits:

$101,400.00 - $152,200.00

The above pay scale reflects the broad, minimum to maximum, pay scale for this job code for the location for which it has been posted. Even more importantly, please note that salary is only one component of total compensation at Qualcomm.

• We also offer a competitive annual discretionary bonus program and opportunity for annual RSU grants (employees on sales-incentive plans are not eligible for our annual bonus).
• In addition, our highly competitive benefits package is designed to support your success at work, at home, and at play.