ASIC Design Engineer (IP/SoC) - High-Performance, Low-Power

Qualcomm Incorporated; San Diego (CA); On-site; USD 101,000 - 152,000; Full time

Job summary

Qualcomm Technologies, Inc. in San Diego, CA, seeks an ASIC Engineer to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP for high-performance, low-power blocks/SoCs.

You will collaborate with cross-functional teams, develop architectures, write specifications, and support RTL to GDS flows and design verification methods to meet system requirements and customer needs.

Qualifications

• Bachelor's degree required.
• Master's degree preferred.
• 6+ months of experience with architecture and design tools.
• 6+ months of experience with scripting languages.
• 6+ months of experience with design verification methods.

Responsibilities

• Define, model, design (digital/analogue) IP for high-performance, low-power products.
• Assist in architectures, specifications, and system simulations.
• Collaborate to develop implementation strategies meeting system requirements.
• Support design flow from high-level design to synthesis, place and route, timing and power use.
• Utilize RTL to GDS Flow and Virtuoso to enable architecture and design.
• Write technical documentation for EDA/IP/ASIC projects.

Skills

ASIC knowledge

Scripting languages

Design verification

Collaboration

Education

Bachelor's degree in Science, Engineering, or related field

Master's degree in Electrical/Electronic or Computer Engineering/CS

Tools

RTL to GDS Flow

Virtuoso

Job description

Qualcomm Technologies, Inc. in San Diego, CA, seeks an ASIC Engineer to define, model, design (digital and/or analog), optimize, verify, validate, implement, and document IP for high-performance, low-power blocks/SoCs.

You will collaborate with cross-functional teams, develop architectures, write specifications, and support RTL to GDS flows and design verification methods to meet system requirements and customer needs.