AR Display IC Design Lead

Snap; Vancouver (WA); On-site; USD 218,000 - 343,000; Full time

Benefits offered by this job

Equity RSUs

Office in office 4+ days a week

Job summary

Snap Inc. seeks a senior leader to drive RTL design and physical implementation for AR display ICs.

You will guide a small team of digital designers and physical engineers, collaborating with chip architects, verification, and test groups to deliver robust RTL and GDS flows. The role emphasizes deep expertise in digital design, RTL coding, DFT, timing, and toolchains such as Cadence Innovus, Tempus, Genus, PVS, and Mentor Calibre.

Qualifications

• BSEE or MSEE with 10+ years in physical design / digital implementation.
• Minimum 3 years in a management role.

Responsibilities

• Lead RTL-based design and physical implementation efforts for AR display ICs.
• Manage a small team of digital designers and physical design engineers.
• Collaborate with chip architects, verification, analog design and test functions.
• Drive RTL-to-GDSI, timing closure, DFT insertion and physical verification.
• Hire and mentor staff as the group expands.

Skills

People management

RTL design

Digital implementation

DFT

Timing closure

Scripting (TCL)

Python

Automation

Education

BSEE or MSEE

Tools

Cadence Innovus

Tempus

Genus

PVS

Mentor Calibre

Conformal LEC

Virtuoso

Job description

Snap Inc. seeks a senior leader to drive RTL design and physical implementation for AR display ICs.

You will guide a small team of digital designers and physical engineers, collaborating with chip architects, verification, and test groups to deliver robust RTL and GDS flows. The role emphasizes deep expertise in digital design, RTL coding, DFT, timing, and toolchains such as Cadence Innovus, Tempus, Genus, PVS, and Mentor Calibre.