Remote IC Verification Engineer for AR Display ASIC

SNAP, Inc.; Washington; Hybrid; USD 147,000 - 259,000; Full time

Job summary

Snap Inc in Washington is seeking an Integrated Circuit Design Verification Engineer to join the Spectacles team. You will design display ICs for AR, collaborating with digital and analog designers, software and verification engineers.

You will develop UVM-based and assertion-based testbenches, create verification plans with coverage, and use Siemens Questa for verification and debugging while configuring tools and building automation.

Qualifications

• Strong knowledge of UVM and SystemVerilog for verification.
• Experience with Siemens Questa for verification.
• Proficient Verilog RTL coding practices.
• Scripting in TCL, Make, Perl, Python and shell in Linux.
• Excellent written and verbal English communication.

Responsibilities

• Work as part of a multi-disciplinary team designing display ICs for AR
• Work closely with digital design, analog logic, software and verification engineers
• Develop and implement UVM-based and assertion-based testbenches
• Create and execute verification test plans, including functional coverage and code coverage
• Utilize Siemens Questa tool set for verification and debug tasks
• Specify and configure tools and create automation

Skills

UVM & SystemVerilog

Siemens Questa

Verilog RTL coding

Scripting (TCL/Python/Linux)

English communication

Education

BSEE / MSEE or relevant experience

Tools

Siemens Questa

Job description

Snap Inc in Washington is seeking an Integrated Circuit Design Verification Engineer to join the Spectacles team. You will design display ICs for AR, collaborating with digital and analog designers, software and verification engineers.

You will develop UVM-based and assertion-based testbenches, create verification plans with coverage, and use Siemens Questa for verification and debugging while configuring tools and building automation.