Analog Mix-Signal Design/Design Verification Engineer

TETRAMEM INC; San Jose (CA); On-site; USD 110,000 - 300,000; Full time

Job summary

TetraMem invites engineers to advance analog/mixed-signal verification for cutting-edge memory ICs in a fast-paced setting. You will craft verification plans, build testbenches, and verify circuit behavior end-to-end, collaborating closely with circuit designers.

The role emphasizes strong modeling skills in SystemVerilog, SPICE, and HDL simulations, with opportunities to influence design methodologies and improve verification workflows. Expect a collaborative team and challenging projects.

Qualifications

• Experience in analog and mixed-signal circuit design and verification.
• Ability to write test plans, present results, and communicate with multi-functional teams.
• Familiarity with verification methodologies and tools: simulators, waveform viewers, and coverage.

Responsibilities

• Develop and implement mixed-signal verification and coverage plans for complex IC designs.
• Design and develop verification testbenches using industry-standard methodologies.
• Write and execute test cases to verify mixed-signal circuits for functionality and reliability.
• Review results and provide feedback to design teams.
• Collaborate with design and layout teams to resolve issues.
• Sign-off mixed-signal designs in preparation for tapeout.
• Write SystemVerilog behavioral models for analog/mixed-signal circuits.

Skills

Analog and mixed-signal design

Verification planning

SystemVerilog / Verilog

Python scripting

Team collaboration

Education

Bachelor's degree in Electrical Engineering

Tools

Verilog/SystemVerilog

SPICE simulation

HDL simulation

Job description

At TetraMem, we are redefining the future of AI with our groundbreaking innovations in In-Memory Computing. Leveraging world-record multi-level RRAM technology, we deliver highly efficient solutions for AI computations, enabling superior performance and energy efficiency across applications ranging from edge devices to data centers. Our talented team of engineers and industry-leading executives drives this progress, making TetraMem a leader in advanced memory technologies.
If you are passionate about cutting-edge technology and thrive in a fast-paced, collaborative environment, TetraMem is the place for you. Join our global team to shape the future of AI computations and sustainable technology solutions while working at the forefront of innovation. Together, we can make a lasting impact.

Are you ready for new challenges and new opportunities?

Join our team!

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Analog Mix-Signal Design/Design Verification Engineer

• Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications
• Design and develop verification testbenches using industry-standard verification languages and methodologies
• Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability
• Review and analyze verification results, and provide feedback to design teams
• Collaborate with design and layout teams to identify and resolve design issues
• Develop new verification methodologies, tools, and techniques, ensuring scalability and portability
• Sign-off mixed signal designs in preparation for tapeout
• Write behavioral models from custom analog and mixed-signal circuits in SystemVerilog HDL
• Collaborate with circuit design teams to understand fine details of custom circuits
• Collaborate with Design Verification team to craft hooks into the behavioral models for effective verification
• Run various simulations and equivalence checks to ensure that the model matches closely with the custom circuits
• Write scripts and simple tools for automating repetitive tasks
• Optimize and refine models to ensure accuracy while maintaining efficient simulation performance
• Review and analyze verification results, and provide feedback to design team
• Document modeling techniques and results for internal and external dissemination
• Keep updated with industry trends in modeling techniques

• Bachelor's degree in Electrical Engineering and 5+ years of relevant industry experience or equivalent
• Strong understanding of analog and mixed-signal circuit design and verification
  principles
• Ability to write test plans, present results, and communicate clearly with multi-functional teams
• Have a familiarity with verification methodologies and tools: simulators, waveform
  viewers, execution automation, simulation time optimization, and coverage collection
• Familiarity with analog behavioral models is a plus
• Deep knowledge of Verilog/SystemVerilog with ability to write synthesize-able and behavioral code
• Deep knowledge of digital logic gates, clocking and state elements
• Deep knowledge of SPICE simulation, HDL simulation and logic equivalence tools
• Working understanding of analog circuit architecture such as ADC, DAC, LDO, Charge pump, etc.
• Have good programming skills and can write efficient programs or scripts in Perl, Python, and/or C
• Excellent debugging, problem-solving and analytical skills
• Strong communication and teamwork skills

Salary Range: $110,000 - $300,000 / year

TetraMem celebrates diversity and is committed to creating an inclusive environment for all employees. We are proud to be an Equal Opportunity Employer and welcome applicants from all backgrounds. Qualified candidates will receive consideration for employment without regard to race, color, religion, creed, sex, gender identity or expression, sexual orientation, national origin, ancestry, age, marital status, medical condition, disability, genetic information, military or veteran status, or any other characteristic protected by applicable federal, state, or local law.
TetraMem is committed to providing reasonable accommodations to qualified applicants with disabilities throughout the recruitment process. Applicants requiring accommodation may contact Human Resources for assistance.