Analog/Mixed-Signal Verification Engineer

TetraMem - Accelerate The World; San Jose (CA); On-site; USD 110,000 - 300,000; Full time

Job summary

TetraMem - Accelerate The World is seeking an experienced mixed-signal verification engineer in San Jose, CA, to develop verification plans and testbenches for complex IC designs. You will verify analog/mixed-signal circuits, run simulations, and analyze results to ensure performance and reliability.

You will collaborate with circuit design and layout teams, write robust SystemVerilog models, and help optimize verification methodologies for scalable, portable flows.

Qualifications

• Bachelor's degree in Electrical Engineering with 5+ years of relevant industry experience or equivalent.
• Strong understanding of analog and mixed-signal circuit design and verification principles.
• Ability to write test plans, present results, and communicate clearly with multi-functional teams.
• Have familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, simulation time optimization, and coverage collection.
• Familiarity with analog behavioral models is a plus.

Responsibilities

• Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications.
• Design and develop verification testbenches using industry-standard verification languages and methodologies.
• Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability.
• Review and analyze verification results, and provide feedback to design teams.
• Collaborate with design and layout teams to identify and resolve design issues.
• Develop new verification methodologies, tools, and techniques, ensuring scalability and portability.
• Sign-off mixed signal designs in preparation for tapeout.
• Write behavioral models from custom analog and mixed-signal circuits in SystemVerilog HDL.

Skills

Verilog/SystemVerilog

Analog IC design

Mixed-signal verification

Python/Perl/C

Debugging skills

Teamwork

Education

Bachelor's degree in Electrical Engineering

Tools

Verilog simulators

SPICE simulators

Waveform viewers

Python scripting

Job description

Responsibilities

• Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications


• Design and develop verification testbenches using industry-standard verification languages and methodologies


• Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability


• Review and analyze verification results, and provide feedback to design teams


• Collaborate with design and layout teams to identify and resolve design issues


• Develop new verification methodologies, tools, and techniques, ensuring scalability and portability


• Sign-off mixed signal designs in preparation for tapeout


• Write behavioral models from custom analog and mixed-signal circuits in SystemVerilog HDL


• Collaborate with circuit design teams to understand fine details of custom circuits


• Collaborate with Design Verification team to craft hooks into the behavioral models for effective verification


• Run various simulations and equivalence checks to ensure that the model matches closely with the custom circuits


• Write scripts and simple tools for automating repetitive tasks


• Optimize and refine models to ensure accuracy while maintaining efficient simulation performance


• Review and analyze verification results, and provide feedback to design team


• Document modeling techniques and results for internal and external dissemination


• Keep updated with industry trends in modeling techniques

Responsibilities

• Develop and implement mixed-signal verification and coverage plans for complex IC designs based on design architecture and specifications


• Design and develop verification testbenches using industry-standard verification languages and methodologies


• Write and execute test cases to verify mixed-signal circuits for functionality, performance, and reliability


• Review and analyze verification results, and provide feedback to design teams


• Collaborate with design and layout teams to identify and resolve design issues


• Develop new verification methodologies, tools, and techniques, ensuring scalability and portability


• Sign-off mixed signal designs in preparation for tapeout


• Write behavioral models from custom analog and mixed-signal circuits in SystemVerilog HDL


• Collaborate with circuit design teams to understand fine details of custom circuits


• Collaborate with Design Verification team to craft hooks into the behavioral models for effective verification


• Run various simulations and equivalence checks to ensure that the model matches closely with the custom circuits


• Write scripts and simple tools for automating repetitive tasks


• Optimize and refine models to ensure accuracy while maintaining efficient simulation performance


• Review and analyze verification results, and provide feedback to design team


• Document modeling techniques and results for internal and external dissemination


• Keep updated with industry trends in modeling techniques

Requirements

• Bachelor's degree in Electrical Engineering and 5+ years of relevant industry experience or equivalent


• Strong understanding of analog and mixed-signal circuit design and verification principles


• Ability to write test plans, present results, and communicate clearly with multi-functional teams


• Have a familiarity with verification methodologies and tools: simulators, waveform viewers, execution automation, simulation time optimization, and coverage collection


• Familiarity with analog behavioral models is a plus


• Deep knowledge of Verilog/SystemVerilog with ability to write synthesize-able and behavioral code


• Deep knowledge of digital logic gates, clocking and state elements


• Deep knowledge of SPICE simulation, HDL simulation and logic equivalence tools


• Working understanding of analog circuit architecture such as ADC, DAC, LDO, Charge pump, etc.


• Have good programming skills and can write efficient programs or scripts in Perl, Python, and/or C


• Excellent debugging, problem-solving and analytical skills


• Strong communication and teamwork skills

Salary Range: $110,000 - $300,000 / year

TetraMem celebrates diversity and is committed to creating an inclusive environment for all employees. We are proud to be an Equal Opportunity Employer and welcome applicants from all backgrounds. Qualified candidates will receive consideration for employment without regard to race, color, religion, creed, sex, gender identity or expression, sexual orientation, national origin, ancestry, age, marital status, medical condition, disability, genetic information, military or veteran status, or any other characteristic protected by applicable federal, state, or local law.

TetraMem is committed to providing reasonable accommodations to qualified applicants with disabilities throughout the recruitment process. Applicants requiring accommodation may contact Human Resources for assistance.