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Teradyne’s Semiconductor Test Division in Agoura Hills, CA is seeking an Analog Design Engineer to contribute to high-speed analog and mixed-signal ASIC development for automatic test equipment (ATE).
The ideal candidate has 2+ years in analog/mixed-signal IC design, with CMOS circuit design, simulation, and characterization. Collaboration across analog/digital/verification teams and opportunities to apply scripting and AI-enabled tools are offered.
Teradyne’s Semiconductor Test Division in Agoura Hills, CA is seeking an Analog Design Engineer to contribute to high-speed analog and mixed-signal ASIC development for automatic test equipment (ATE).
The ideal candidate has 2+ years in analog/mixed-signal IC design, with CMOS circuit design, simulation, and characterization. Collaboration across analog/digital/verification teams and opportunities to apply scripting and AI-enabled tools are offered.