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Teradyne’s Semiconductor Test Division in Agoura Hills, CA is seeking an Analog Design Engineer to contribute to high-speed analog and mixed-signal ASIC development for automatic test equipment (ATE).
The ideal candidate has 2+ years in analog/mixed-signal IC design, with CMOS circuit design, simulation, and characterization. Collaboration across analog/digital/verification teams and opportunities to apply scripting and AI-enabled tools are offered.
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Location: Agoura Hills, CA, US
We are the global test and automation specialists, powering next-generation technologies through sophisticated solutions. Behind every electronic device you use, Teradyne's test technology ensures your device works right the first time, every time! Our portfolio of automation solutions help manufacturers to develop and deliver products quickly, efficiently and cost-effectively. Together, Teradyne companies deliver manufacturing automation across industries and applications around the world!
We attract, develop, and retain a high-performance workforce, comprised of people with diverse backgrounds and a shared drive for excellence. We strive to foster a positive and inclusive work environment that helps employees, and communities, thrive.
TERADYNE, where experience meets innovation and drives excellence in every connection. We are fueled by creativity and diversity of thought across our workforce. Our employees are supported to innovate, grow, and learn something new every day.
We cultivate a culture of inclusion that respects the individual strengths, perspectives, and experiences of all employees. We believe our differences enable us to be a stronger team, make better decisions, drive innovation, and deliver better business results.
Teradyne’s Semiconductor Test Division in Agoura Hills, CA is seeking an Analog Design Engineerto contribute to the development of high-speed analog and mixed-signal ASICs for Automatic Test Equipment (ATE).
The ideal candidate will have2+ years of relevant industry experience in analog or mixed-signal IC design, with a solid foundation in CMOS circuit design, simulation, and characterization. Experience supporting an ASIC through tape-out and silicon validation is highly desirable.
This role provides an opportunity to develop technical expertise while working alongside experienced engineers across analog design, digital design, verification, validation, test, and EDA. The engineer will also have opportunities to apply scripting, automation, and AI-enabled tools to improve design and engineering workflows.
We are looking for someone who is curious, analytical, collaborative, and motivated to continue developing their expertise in advanced semiconductor design.
We seek individuals who share our passion for innovation and technical excellence. Our commitment to customer success drives us to continually improve how we design and deliver industry-leading solutions.
We are an equal-opportunity employer and value diversity at our company. We do not discriminate on the basis of race, religion, color, national origin, sex, gender, gender expression, sexual orientation, age, marital status, veteran status, or disability status.
We will ensure that individuals with disabilities are provided reasonable accommodations to participate in the job application or interview process, perform essential job functions, and receive other benefits and privileges of employment.
The base salary range for this role is $104,100 to $166,600. This range is a good-faith estimate, and the actual base salary will correspond with the candidate’s experience, skills, qualifications, and location. The range may also fluctuate depending on market demand and geographic location.
This position is eligible for discretionary bonus(es) based on financial performance.
Teradyne offers a variety of robust health and well-being benefit programs, including medical, dental, vision, Flexible Spending Accounts, retirement savings plans, life and disability insurance, paid vacation and holidays, tuition assistance programs, and more.
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