AMS RFIC Verification Engineer: Analog & Digital IP

SpaceX; Irvine (CA); On-site; USD 125,000 - 195,000; Full time

Benefits offered by this job

Stock options

Medical, vision, dental

401(k) retirement plan

Paid parental leave

Job summary

SpaceX is seeking an AMS Verification Engineer to join Silicon Engineering and develop comprehensive verification flows for full‑chip RFICs and RF‑SoCs used in Starlink satellites and ground infrastructure. You will collaborate with cross‑disciplinary teams (systems, firmware, ASIC implementation) to ensure accurate mixed‑signal models and robust test strategies.

The role requires strong SystemVerilog/UVM skills, experience with AMS tools, and the ability to write Verilog‑A/AMS behavioral

Qualifications

• Bachelor’s degree in an engineering discipline.
• 1+ years of research and/or industry experience in integrated circuit design/verification.
• Master’s degree or PhD in an engineering discipline with emphasis in integrated circuit design/verification.
• Experience with AMS simulation tools and flows.
• Experience with annotated gate‑level simulation within an AMS simulator.
• Experience in System‑Verilog, UVM, Python.
• Experience in writing behavioral models for analog/mixed‑mode IPs in Verilog‑A/AMS.
• Understanding of analog circuit fundamentals, and experience simulating LDOs, bandgaps, DACs, ADCs, baseband amplifiers, mixers, RF amplifiers, oscillators, PLLs, etc.
• Understanding of RTL and gate‑level netlists.

Responsibilities

• Develop and own analog‑on‑top and digital‑on‑top design verification flows for full‑chip simulations of in‑house RFICs and RF‑SoCs
• Develop testbenches and flows to simulate critical interfaces between RFICs/SoCs
• Work with designers to improve speed/accuracy of simulations for advanced mixed‑signal IPs (PLLs, DACs, ADCs, etc.)
• Work with designers to create behavioral models of RF/analog/mixed‑mode circuit blocks, and employ these models in chip verification
• Work with ATE test engineering team to develop and prototype testplans
• Setup and run EM/IR simulations

Skills

SystemVerilog

UVM

Python

AMS simulation

RTL understanding

Education

Bachelor’s degree in engineering

Master’s degree or PhD in engineering (preferred)

Tools

AMS simulation tools

Verilog-A/AMS

Annotated gate-level simulation

Job description

SpaceX is seeking an AMS Verification Engineer to join Silicon Engineering and develop comprehensive verification flows for full‑chip RFICs and RF‑SoCs used in Starlink satellites and ground infrastructure. You will collaborate with cross‑disciplinary teams (systems, firmware, ASIC implementation) to ensure accurate mixed‑signal models and robust test strategies.

The role requires strong SystemVerilog/UVM skills, experience with AMS tools, and the ability to write Verilog‑A/AMS behavioral