AI Silicon Performance Architect & Modeling Engineer

Intel Corporation; Santa Clara (CA); Hybrid; USD 142,000 - 232,000; Full time

Job summary

Intel Corporation in Santa Clara, California, seeks an experienced engineer to drive AI silicon performance modeling and architectural analysis. You will develop SystemC/TLM-based models of SoC fabrics, memory subsystems, and interconnects, and collaborate with architects, silicon design teams, and product stakeholders to optimize scalability and performance.

The role requires strong C++ and Python skills, hands-on SystemC/TLM experience, and a proven track record validating models against

Qualifications

• Bachelor's or Master's degree in Computer Engineering, Electrical Engineering, Computer Science, Electronics Engineering.
• 6+ years of industry experience in: Performance modeling, AI silicon architecture, SoC architecture, computer architecture, performance engineering, or related domains.
• Memory subsystem architecture, including memory controllers, cache hierarchies, data movement, and latency/bandwidth characterization and performance bottleneck analysis.
• Software development experience in C++.
• Working proficiency in Python for automation, performance analysis, data processing, and visualization.
• Hands-on experience with SystemC and Transaction-Level Modeling (TLM) methodologies.
• Experience developing or validating performance models for AI accelerators, SoCs, CPUs, GPUs, networking products, or complex hardware systems.

Responsibilities

• Develop AI silicon performance models using SystemC/TLM.
• Validate models and correlate with architectural expectations and hardware measurements.
• Analyze memory systems, interconnects, and data movement paths for bottlenecks.
• Create dashboards and automation pipelines for performance data.
• Collaborate with architects and product stakeholders to influence design decisions.

Skills

C++

Python

SystemC/TLM

Performance modeling

AI silicon architecture

SoC architecture

NoC concepts

Education

BS or MS in Computer Engineering/Electrical Engineering/CS/Electronics

Tools

Power BI

Tableau

Grafana

Plotly

Job description

Intel Corporation in Santa Clara, California, seeks an experienced engineer to drive AI silicon performance modeling and architectural analysis. You will develop SystemC/TLM-based models of SoC fabrics, memory subsystems, and interconnects, and collaborate with architects, silicon design teams, and product stakeholders to optimize scalability and performance.

The role requires strong C++ and Python skills, hands-on SystemC/TLM experience, and a proven track record validating models against