Pre-Silicon AI/SoC Modeling Engineer

Amazon Web Services (AWS); Austin (TX); On-site; USD 144,000 - 194,000; Full time

Benefits offered by this job

Health insurance

401(k) matching

Paid time off

Parental leave

Employee assistance program

Job summary

Annapurna Labs (U.S.) Inc. is seeking a modeling engineer to build and own high-fidelity C++/SystemC models of AI/ML accelerators and SoCs. You will translate architecture specs and RTL into testable models and validate against RTL or silicon measurements.

You will work with design verification, architects, ML software engineers, and compiler teams to optimize architectures, drive correlation, and enable early software development. This is a hands-on, impact-driven role.

Qualifications

• Experience programming languages such as C/C++, Python, Java or Perl.
• 2+ years writing functional or performance models of hardware (SoCs, ASICs, GPUs, CPUs, IP blocks).
• Familiarity with SoC, CPU, GPU, and/or ASIC architecture and micro-architecture.
• 2+ years of full software development life cycle, including coding standards, code reviews, source control management, build processes, testing, and operations experience.
• Experience working with DV teams or integrating models into verification flows.
• Experience with SystemC or TLM-based modeling.
• Experience correlating functional models against RTL simulation or emulation.
• Experience developing or calibrating performance models.
• Familiarity with Modern C++ (20 and beyond).
• Experience with PyTest, GoogleTest, or similar test frameworks.
• Experience with multi-threaded simulation.

Responsibilities

• Develop and maintain high-fidelity functional model of AI/ML accelerator and its SoC subsystems, including compute engines, memory hierarchies, on-chip interconnects, and data paths — translating architecture specs and RTL behavior into accurate, testable C++ models
• Validate model behavior against RTL simulations, emulation platforms, or silicon measurements; debug discrepancies and drive model-to-RTL correlation to high fidelity
• Partner with design verification teams to integrate models into pre-silicon validation environments and catch architectural bugs early in the design cycle
• Collaborate with architects/micro-architects, RTL design engineers, ML SW engineers, and compiler engineers to evaluate architecture and microarchitecture tradeoffs and help make hardware design decisions
• Contribute to cycle-approximate performance model effort enabling architectural exploration ahead of RTL availability, early software development
• Quantify system-level tradeoffs across compute, memory bandwidth, networking, and storage to influence reference architectures and long-term silicon strategy
• Build and improve modeling infrastructure: simulation frameworks, regression suites, automated correlation checks, and coverage-driven validation flows
• Develop modeling methodologies and tools that scale across multiple IP blocks and SoC generations, improving team efficiency and model reuse

Skills

C++

SystemC

RTL verification

Python

DV workflows

Tools

SystemC

TLM

Verilog

Job description

Annapurna Labs (U.S.) Inc. is seeking a modeling engineer to build and own high-fidelity C++/SystemC models of AI/ML accelerators and SoCs. You will translate architecture specs and RTL into testable models and validate against RTL or silicon measurements.

You will work with design verification, architects, ML software engineers, and compiler teams to optimize architectures, drive correlation, and enable early software development. This is a hands-on, impact-driven role.