AI-Optimized Memory Architect: RTL & Silicon

Micron Technology, Inc.; Folsom (CA); On-site; USD 175,000 - 309,000; Full time

Job summary

Micron Technology, Inc. is seeking a Member of Technical Staff to translate architectural vision into silicon-proven hardware for AI memory architectures. You will design SystemVerilog RTL, optimize via synthesis and PPA, and guide decisions across the development lifecycle.

Responsibilities include driving concepts to silicon, documenting microarchitectures, and evaluating tradeoffs to balance performance, power, and area. Strong collaboration across teams is essential.

Qualifications

• Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or related technical field.
• Strong experience in digital design and microarchitecture development with ownership of hardware blocks from specification through implementation.
• Solid understanding of computer architecture and memory systems, including SoC-level behaviors and tradeoffs.
• Experience with synthesis flows and early PPA estimation and optimization.
• Proficiency in SystemVerilog and at least one programming language such as C, C++, or Python

Responsibilities

• Translate architecture requirements into scalable microarchitectures and drive implementation from concept through silicon.
• Design, implement, and review SystemVerilog RTL for advanced memory system architectures.
• Perform synthesis and early PPA analysis to optimize area, power, and timing.
• Develop and maintain microarchitecture documentation that aligns design intent across teams.
• Evaluate architectural and implementation tradeoffs to support technical decision-making

Skills

Digital design

SystemVerilog

C/C++/Python

Memory architectures

Education

Bachelor’s degree in CS/CE/EE

Tools

SystemVerilog

Job description

Micron Technology, Inc. is seeking a Member of Technical Staff to translate architectural vision into silicon-proven hardware for AI memory architectures. You will design SystemVerilog RTL, optimize via synthesis and PPA, and guide decisions across the development lifecycle.

Responsibilities include driving concepts to silicon, documenting microarchitectures, and evaluating tradeoffs to balance performance, power, and area. Strong collaboration across teams is essential.