MTS, AI Optimized Memory Digital Design Engineer

Micron Technology; Folsom (CA); On-site; USD 175,000 - 309,000; Full time

Job summary

Micron Technology in the United States is seeking a Member of Technical Staff to translate architectural vision into silicon-proven hardware implementations for high-performance memory systems. You will design and review SystemVerilog RTL, optimize area, power, and timing, and document microarchitectures to align cross-team understanding.

The role focuses on scalable memory architectures for AI workloads, balancing performance and reliability across the development lifecycle, with opportunities

Qualifications

• Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field.
• Strong experience in digital design and microarchitecture development with ownership of hardware blocks from specification through implementation.
• Proficiency in SystemVerilog and at least one programming language such as C, C++, or Python.

Responsibilities

• Translate architecture requirements into scalable microarchitectures and drive implementation from concept through silicon
• Design, implement, and review SystemVerilog RTL for advanced memory system architectures
• Perform synthesis and early PPA analysis to optimize area, power, and timing
• Develop and maintain microarchitecture documentation that aligns design intent across teams
• Evaluate architectural and implementation tradeoffs to support technical decision-making

Skills

SystemVerilog

Digital design

Microarchitecture

C/C++

Python

Education

Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or related field

Job description

Our vision is to transform how the world uses information to enrich life for all. Micron Technology is a world leader in innovating memory and storage solutions that accelerate the transformation of information into intelligence, inspiring the world to learn, communicate and advance faster than ever.

Join Micron’s AI-Optimized Memory Architecture team, where we are shaping the future of artificial intelligence workloads through next-generation memory solutions. We partner closely with customers to architect and deliver high-performance memory systems that enable emerging AI platforms and applications. Our team values innovation, technical excellence, and collaboration as we bring advanced memory technologies from concept to silicon.

As a Member of Technical Staff, you will play a key role in translating architectural vision into efficient, silicon-proven hardware implementations. This position offers the opportunity to work on tightly coupled, high-performance memory architectures for AI, balancing performance, power, area, and reliability while influencing critical design decisions across the development lifecycle.

Responsibilities

• Translate architecture requirements into scalable microarchitectures and drive implementation from concept through silicon
• Design, implement, and review SystemVerilog RTL for advanced memory system architectures
• Perform synthesis and early PPA analysis to optimize area, power, and timing
• Develop and maintain microarchitecture documentation that aligns design intent across teams
• Evaluate architectural and implementation tradeoffs to support technical decision-making

Minimum Qualifications

• Bachelor’s degree in Computer Science, Computer Engineering, Electrical Engineering, or a related technical field
• Strong experience in digital design and microarchitecture development with ownership of hardware blocks from specification through implementation
• Solid understanding of computer architecture and memory systems, including SoC-level behaviors and tradeoffs
• Experience with synthesis flows and early PPA estimation and optimization
• Proficiency in SystemVerilog and at least one programming language such as C, C++, or Python

Preferred Qualifications

• Master’s or PhD in Computer Science, Computer Engineering, Electrical Engineering, or equivalent experience
• 5+ years of industry experience delivering silicon-proven memory systems or SoC hardware designs on modern process nodes
• Familiarity with memory interfaces, reliability features, and media management concepts
• Experience influencing architecture features with a strong understanding of RTL implementation cost and feasibility
• Experience working with Agentic AI tools to assist with design and verification

US base salary range that Micron Technology estimates it could pay for this full-time position is: $175,000.00 - $309,000.00 a year

Additional Compensation May Include Benefits, Bonuses And Equity.

Benefits

• Medical, dental and vision plans in all locations enabling team members to select the plans that best meet their family healthcare needs and budget.
• Benefit programs that help protect your income if you are unable to work due to illness or injury.
• Paid family leave.
• Robust paid time-off program and paid holidays.

Micron is proud to be an equal opportunity workplace and is an affirmative action employer. All qualified applicants will receive consideration for employment without regard to race, color, religion, sex, sexual orientation, age, national origin, citizenship status, disability, protected veteran status, gender identity or any other factor protected by applicable federal, state, or local laws.