AI-Driven HW/SW Co-Design Engineer

Phinity Labs, Inc.; San Francisco (CA); On-site; USD 170,000 - 210,000; Full time

Benefits offered by this job

Health insurance

Retirement plans

Unlimited PTO

Paid parental leave

Lunch and dinner provided in-office

Job summary

Phinity Labs, Inc. in San Francisco invites applications for a HW/SW Codesign Engineer who operates at the silicon–software boundary to define how a new chip will be used, heavily using AI to speed development.

You will design the hardware/software interface, and own firmware, drivers, and runtimes for bring-up. You will balance hardware and software responsibilities, validate across emulation, FPGA, and bring-up, and communicate clearly in a fast-moving environment.

Qualifications

• 6+ years building across the HW/SW boundary: firmware, drivers, runtimes, or embedded systems, with a working understanding of the underlying silicon
• Knowledge of how accelerators and SoCs are programmed: command and queue models, DMA and memory movement, scheduling, and instruction or ISA interfaces
• Experience using AI to develop hardware or software
• Strong communication skills and willingness to try new methods in ambiguous and fast-moving environments

Responsibilities

• Design the hardware/software interface for edge compute chips: the programming model, command processors, memory movement, and runtime-visible scheduling that let software drive the hardware
• Build and own the firmware, drivers, and runtime for chip bring-up and expose its capabilities to software
• Make co-design tradeoffs across the boundary, deciding what belongs in hardware, firmware, or software, and own the technical bar for how they fit together
• Validate the subsystem across emulation, FPGA, and bring-up, making sure software-visible behavior matches intent

Skills

Firmware development

Device drivers

Embedded systems

Hardware/software co-design

AI for hardware

Tools

FPGA

Emulation tools

ASIC verification

Job description

Phinity Labs, Inc. in San Francisco invites applications for a HW/SW Codesign Engineer who operates at the silicon–software boundary to define how a new chip will be used, heavily using AI to speed development.

You will design the hardware/software interface, and own firmware, drivers, and runtimes for bring-up. You will balance hardware and software responsibilities, validate across emulation, FPGA, and bring-up, and communicate clearly in a fast-moving environment.