AI-Driven DRAM Verification Architect

Micron Technology, Inc.

Boise (ID)

On-site

USD 170,000 - 230,000

Full time

10 days ago

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Benefits offered by this job

Medical, dental and vision plans
Paid time-off

Job summary

Micron Technology, Inc. in Boise, Idaho seeks a Principal Design Verification Engineer to lead next-generation DRAM verification—architect scalable UVM environments, drive coverage, and improve silicon quality.

You will mentor engineers and collaborate across design, architecture, and product teams to accelerate verification closure. Bring 10+ years in digital verification, strong SystemVerilog/UVM expertise, and experience with AI-driven verification techniques to enable faster, higher-quality

Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
  • 10+ years of experience in digital design verification.
  • Strong expertise in SystemVerilog, UVM, constrained-random verification, functional coverage, and assertion-based verification.
  • Experience developing scalable digital verification testbenches, reusable verification IP, and automation solutions.
  • Hands-on experience with gate-level simulation and waveform analysis.
  • Solid foundation in VLSI circuit design fundamentals.
  • Strong communication and mentoring skills.

Responsibilities

  • Lead digital verification methodology and infrastructure development for next-generation DRAM products.
  • Architect scalable UVM-based verification environments and reusable verification IP.
  • Drive verification planning, coverage closure, and silicon quality across projects.
  • Innovate with AI-driven verification, automation, and data-centric workflows.
  • Partner with cross-functional teams to accelerate product development and ensure first-pass silicon success.
  • Mentor engineers and promote verification best practices across the organization.
  • Drive continuous improvements in verification efficiency, quality, and productivity.

Skills

SystemVerilog
UVM
Constrained-random
Functional coverage
Assertion-based verification
Verification automation
Gate-level simulation
Python
AI/ML in verification
Technical leadership

Education

Bachelor's or Master's in Electrical/Computer Engineering

Tools

Python
Waveform analysis

Job description

Micron Technology, Inc. in Boise, Idaho seeks a Principal Design Verification Engineer to lead next-generation DRAM verification—architect scalable UVM environments, drive coverage, and improve silicon quality.

You will mentor engineers and collaborate across design, architecture, and product teams to accelerate verification closure. Bring 10+ years in digital verification, strong SystemVerilog/UVM expertise, and experience with AI-driven verification techniques to enable faster, higher-quality

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