Senior DRAM Verification Quality Engineer AI-Driven Leader

Micron; Boise (ID); On-site; USD 170,000 - 250,000; Full time

Benefits offered by this job

Health benefits

Paid time off

Paid holidays

Job summary

Micron Technology is seeking a Principal Engineer to lead DRAM verification quality and AI-enabled strategies across project families. You will drive verification methodology, improve coverage and traceability, and mentor teams in scalable verification workflows.

Ideal candidates have 10+ years in DRAM verification, strong SystemVerilog/UVM skills, and experience with AI-driven productivity tools, Linux, and EDA environments. Collaboration across organizations is essential.

Qualifications

• Bachelor's degree in Electrical Engineering, Computer Engineering, or related field.
• 10+ years of DRAM verification, validation, or product engineering.
• Strong expertise in digital and analog verification methodologies, testbench development, stimulus generation, and debug.
• Experience with AI/ML/LLM tools to improve engineering productivity.

Responsibilities

• Define and drive DRAM verification methodology, quality standards, and AI-enabled strategies to improve coverage, traceability, efficiency, and defect prevention.
• Lead closed-loop silicon learning by identifying verification gaps and incorporating lessons learned into requirements and standard methodologies.
• Own and continuously improve the JAMA requirements framework, ensuring alignment, scalability, and adoption across projects and teams.
• Simplify and optimize verification workflows through automation, AI, and process improvements that reduce cycle time and accelerate debug.

Skills

DRAM verification

SystemVerilog/UVM

Python scripting

AI/ML tools

Linux environments

Cadence Virtuoso

Education

Bachelor's degree in Electrical or Computer Engineering

MS in Electrical Engineering (preferred)

Tools

SpectreFx

PrimeSim

Job description

Micron Technology is seeking a Principal Engineer to lead DRAM verification quality and AI-enabled strategies across project families. You will drive verification methodology, improve coverage and traceability, and mentor teams in scalable verification workflows.

Ideal candidates have 10+ years in DRAM verification, strong SystemVerilog/UVM skills, and experience with AI-driven productivity tools, Linux, and EDA environments. Collaboration across organizations is essential.