Lead DRAM Verification Architect | AI-Driven Testbench & Automation

Micron Technology, Inc.; Boise (ID); On-site; USD 150,000 - 210,000; Full time

Benefits offered by this job

Medical, dental and vision plans

Paid time off

Paid holidays

Job summary

Micron Technology, Inc. in Boise, Idaho is seeking a Principal Design Verification Engineer to lead digital verification for next‑generation DRAM products.

You will architect scalable UVM‑based environments, drive verification planning and AI‑driven workflows, and mentor engineers to improve silicon quality and delivery speed. In this role you partner with cross‑functional teams to accelerate development, implement reusable verification IP, and champion continuous improvements in verification

Qualifications

• Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.
• 10+ years of relevant experience in digital design verification.
• Strong expertise in SystemVerilog, UVM, constrained-random verification, functional coverage, and assertion-based verification.
• Experience developing scalable digital verification testbenches, reusable verification IP, and verification automation solutions.
• Hands-on experience with gate-level simulation and debug environments.
• Solid foundation in VLSI circuit design fundamentals.
• Strong written and verbal communication skills with demonstrated technical leadership and mentoring experience.

Responsibilities

• Lead digital verification methodology and infrastructure development for next-generation DRAM products.
• Architect scalable UVM-based verification environments, reusable verification IP, and automation solutions.
• Drive verification planning, coverage closure, and silicon quality across multiple projects.
• Innovate with AI-driven verification, intelligent automation, and data-centric verification workflows.
• Partner with cross-functional teams to accelerate product development and ensure first-pass silicon success.
• Mentor engineers and influence verification best practices across the organization.
• Champion continuous improvements in verification efficiency, quality, and productivity.

Skills

SystemVerilog

UVM

Constrained-random verification

Functional coverage

Assertion-based verification

Verification automation

AI/ML in verification

Python

Leadership & mentoring

Testbench architecture

Education

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related engineering field

Tools

Python

Verification IP

Waveform analysis

Job description

Micron Technology, Inc. in Boise, Idaho is seeking a Principal Design Verification Engineer to lead digital verification for next‑generation DRAM products.

You will architect scalable UVM‑based environments, drive verification planning and AI‑driven workflows, and mentor engineers to improve silicon quality and delivery speed. In this role you partner with cross‑functional teams to accelerate development, implement reusable verification IP, and champion continuous improvements in verification