AI Accelerator Architect - Energy-Efficient Compute

Digitailor; Palo Alto (CA); On-site; USD 240,000 - 420,000; Full time

Job summary

Normal Computing seeks an experienced Hardware ASIC Architect to define silicon and system microarchitecture for a novel AI accelerator platform. You will lead hardware/software co-design, translating transformer and diffusion workloads into custom compute tiles and memory hierarchies.

Collaboration with RTL, compiler, and analog teams is essential to maximize throughput-per-watt on real-world generative AI workloads.

Qualifications

• Experience in architecture or microarchitecture of high-performance digital systems, AI accelerators or compute engines.
• Ability to translate workload analysis into datapath widths and power estimates.
• Familiarity with quantization and reduced-precision implementations for inference.
• Proficiency in Python or C++ for performance modeling and analysis, and SystemVerilog for RTL work.

Responsibilities

• Define the architecture and microarchitecture of AI accelerator compute blocks and PE arrays.
• Translate workload analysis into hardware specifications and microarchitecture documents.
• Defend full-stack PPA tradeoffs across algorithm, memory, interconnect, and physical design.
• Collaborate with compiler, RTL/ASIC, and analog teams to ensure tapeout readiness.
• Prototype and validate pre-silicon solutions with cross-disciplinary teams.

Skills

AI accelerators

Microarchitecture

Python

C++

Performance modeling

Cycle-accurate models

Dataflow design

Quantization awareness

Education

Electrical Engineering

Computer Engineering

Computer Science

PhD welcome

Tools

SystemVerilog

RTL

Job description

Normal Computing seeks an experienced Hardware ASIC Architect to define silicon and system microarchitecture for a novel AI accelerator platform. You will lead hardware/software co-design, translating transformer and diffusion workloads into custom compute tiles and memory hierarchies.

Collaboration with RTL, compiler, and analog teams is essential to maximize throughput-per-watt on real-world generative AI workloads.