Senior Principal Digital Design Engineer - Physical

Infineon Technologies AG; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Infineon Technologies AG in Singapore is seeking a Digital Design Engineer to drive physical design for complex digital blocks. You will own floorplanning, placement, clock tree synthesis, routing, and QC checks, ensuring tight timing and power optimization within the backend flow.

The role requires 7–10+ years of experience, a Bachelor’s in Electrical or Computer Engineering, and strong TCL/Python scripting skills.

Qualifications

• Bachelor’s degree in Electrical or Computer Engineering required.
• 7–10+ years of industry experience in physical design engineering.
• Experience on blocks or top-level physical design required.
• Strong knowledge of timing closure, IR/EM, LVS/DRC closure.
• Experience with TCL and Python scripting.

Responsibilities

• Own physical design implementation for complex digital blocks and subsystems, including floorplanning, placement, clock tree synthesis, routing, and physical optimization.
• Drive timing closure, congestion analysis, power optimization, and area improvement; analyze timing, signal integrity, and reliability issues across backend flow.
• Perform physical verification (DRC, LVS, ERC) and collaborate with RTL, DFT, and STA teams on issues.
• Develop and refine constraints, scripts, and flow improvements; document design implementations and signoff status.
• Support tapeout planning and execution to meet milestones.

Skills

Physical design

Timing closure

IR/EM

LVS/DRC

TCL scripting

Python scripting

Teamwork

Cross-functional collaboration

Backend flow optimization

Problem solving

Education

Bachelor’s in Electrical Engineering or Computer Engineering

Tools

TCL

Python

Job description

Infineon Technologies AG in Singapore is seeking a Digital Design Engineer to drive physical design for complex digital blocks. You will own floorplanning, placement, clock tree synthesis, routing, and QC checks, ensuring tight timing and power optimization within the backend flow.

The role requires 7–10+ years of experience, a Bachelor’s in Electrical or Computer Engineering, and strong TCL/Python scripting skills.