Senior Digital Design Engineer – RTL & Verification

Infineon Technologies AG; Singapore; On-site; SGD 65,000 - 85,000; Full time

Job summary

Infineon Technologies AG in Singapore seeks an Engineer / Senior Engineer for Digital Design in its R&D team. You will shape future technology by coding RTL for sensors and mixed-signal IPs, performing synthesis, STA, and verification tasks, and collaborating with physical design to meet timing closures.

The role requires a degree in Electrical Engineering with 0–3 years in digital design and strong knowledge of Cadence/Synopsys EDA tools, SystemVerilog, and Verilog/VHDL.

Qualifications

• Bachelor/Masters Degree in Electrical Engineering or similar field with a focus on electronics.
• Min. 0-3 years of professional experience in the field of Digital Design with good knowledge of EDA tools (Cadence, Synopsys).
• Proficiency in SystemVerilog and/or Verilog/VHDL for RTL design and verification tasks.
• Familiar with the entire digital design flow as in LEC, Spyglass, defining constraints for synthesis, ATPG and PrimeTime analysis.
• A good understanding of IP development flow, chip integration, timing-analysis, and testability.
• Knowledge in mixed-signal IPs like ADC, PMU, oscillator and temp sensors would be an advantage.
• Good English communication and interpersonal skills to the stakeholders.

Responsibilities

• Register Transfer Level (RTL) design coding and verify digital circuits for sensor and other mixed-signal IPs.
• Perform RTL design and behavioral model coding, logic synthesis, STA, and structural checks (LEC, Spyglass).
• Execute DFT/power integrity activities – Scan Insertion, ATPG & power analysis.
• Work with Physical designer to achieve timing closure and ECO fixes if required.
• Support verification engineers to define verification test items.
• Support view generation engineers to verify the correctness of the IPs views.

Skills

RTL design

SystemVerilog

Verilog/VHDL

Digital design flow

Education

Bachelor/Master's in Electrical Engineering or similar

Tools

Cadence

Synopsys

EDA tools

Job description

Infineon Technologies AG in Singapore seeks an Engineer / Senior Engineer for Digital Design in its R&D team. You will shape future technology by coding RTL for sensors and mixed-signal IPs, performing synthesis, STA, and verification tasks, and collaborating with physical design to meet timing closures.

The role requires a degree in Electrical Engineering with 0–3 years in digital design and strong knowledge of Cadence/Synopsys EDA tools, SystemVerilog, and Verilog/VHDL.