Senior SoC Design Engineer - Digital Blocks & RF

Silicon Labs Intl; Singapore; On-site; SGD 90,000 - 120,000; Full time

Job summary

Silicon Labs in Singapore is seeking an experienced digital design engineer to drive block architecture, RTL implementation, and SoC integration across mixed-signal IP. You will collaborate with cross-functional teams to develop requirements, define design approaches, and ensure high-quality verification and documentation for next-generation edge connectivity solutions.

The role emphasizes embedded firmware development, block-level verification, and infrastructure work to support advanced

Qualifications

• Detailed block architecture/design of digital circuits
• In-depth understanding of block requirements, system needs, and interfaces
• Develop block specification, working with cross-functional teams to develop requirements
• Determine appropriate design approach and partitioning
• Implement design through RTL coding, adhering to quality guidelines
• SoC Integration
• Integration of digital blocks / IP into the SoC infrastructure
• Development of SoC infrastructure, such as bus matrix, memory interfaces, clocking, power management,reset management
• Integration of mixed signal and RF IP
• Verification Block level verification to validate block performance with adherence to requirements using directed, random,and assertion based methods
• SoC integration and infrastructure verification
• Verification of mixed-signal and RF IP integration, including mixed-signal modeling and cosimulation
• Develop embedded firmware to verify SoC Integration and Validation.
• Documentation Perform requirement, architecture, design, and verification reviews
• Develop customer facing reference manual and datasheet material

Responsibilities

• Develop block specification, working with cross-functional teams to develop requirements
• Implement design through RTL coding, adhering to quality guidelines
• SoC Integration
• Development of SoC infrastructure, such as bus matrix, memory interfaces, clocking, power management,reset management
• Integration of mixed signal and RF IP
• Verification Block level verification to validate block performance with adherence to requirements using directed, random,and assertion based methods
• Develop embedded firmware to verify SoC Integration and Validation.
• Documentation Perform requirement, architecture, design, and verification reviews
• Develop customer facing reference manual and datasheet material

Skills

RTL coding

SoC integration

Digital design

Embedded firmware

Tools

Verilog/SystemVerilog

Job description

Silicon Labs in Singapore is seeking an experienced digital design engineer to drive block architecture, RTL implementation, and SoC integration across mixed-signal IP. You will collaborate with cross-functional teams to develop requirements, define design approaches, and ensure high-quality verification and documentation for next-generation edge connectivity solutions.

The role emphasizes embedded firmware development, block-level verification, and infrastructure work to support advanced