Senior NPU Design Engineer - RTL & Microarchitecture

OmniVision Technologies Singapore Pte. Ltd.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

OmniVision Technologies Singapore Pte. Ltd. is seeking an experienced NPU Design Engineer (Staff/Sr.

Staff) to translate system specs into detailed design requirements and practical RTL blocks. You will drive microarchitecture decisions, optimize for PPA, and collaborate with verification and software teams to ensure robust designs. Ideal candidates have 8+ years in digital design with SoC exposure, hands-on RTL experience, and leadership of a small team.

Qualifications

• 8+ years of digital design with some SoC experience preferred.
• At least one NPU design completion experience required.
• Hands-on digital design experience a must.
• Possess leadership experience managing a small team.

Responsibilities

• Develop design requirements from system specs.
• Model performance and data throughput for NPU module.
• RTL coding for NPU sub-blocks in Verilog/SystemVerilog.
• Analyze convolution formats and number systems.
• Estimate and optimize PPA (performance/power/area).
• Lead microarchitecture optimization for low power/area.
• Collaborate with verification engineers for testing.
• Support integration, lint/timing/CDC checks.
• Coordinate with software teams on compiler/toolchain debugging.
• Produce design documentation.

Skills

Digital design

RTL coding

Verilog/SystemVerilog

Microarchitecture

Team leadership

Convolution math

Power/Area optimization

Communication

C/C++ familiarity

Education

MSEE/BSEE in Electrical or Computer Engineering

Tools

Verilog

SystemVerilog

UVM

Job description

OmniVision Technologies Singapore Pte. Ltd. is seeking an experienced NPU Design Engineer (Staff/Sr.

Staff) to translate system specs into detailed design requirements and practical RTL blocks. You will drive microarchitecture decisions, optimize for PPA, and collaborate with verification and software teams to ensure robust designs. Ideal candidates have 8+ years in digital design with SoC exposure, hands-on RTL experience, and leadership of a small team.