(Sr./Staff) NPU Design Engineer

OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD.; Singapore; On-site; SGD 75,000 - 95,000; Full time

Job summary

OMNIVISION TECHNOLOGIES SINGAPORE PTE. LTD. is seeking a skilled engineer for NPU design, focused on digital design and robust RTL coding using Verilog/System Verilog. Ideal candidates have 5+ years of experience, including hands-on work in microarchitecture and empowered design strategies.

Key responsibilities include optimizing performance, power, and area, collaborating directly with verification engineers, and participating in documentation processes essential for system integration.

Candidates with experience in ARM or RISC-V processor systems are preferred. Opportunities for senior roles available based on experience.

Qualifications

• 5+ years of digital design experience, preferably with SoC design.
• Hands-on experience in digital design and at least one completed NPU design cycle.
• Understanding of convolution operators and number systems.

Responsibilities

• Develop design requirements for an NPU based on specifications.
• Microarchitecture design and RTL coding using Verilog/System Verilog.
• Estimate, measure, and optimize PPA to meet objectives.

Skills

Digital design experience

Verilog/System Verilog

Microarchitecture design

Communication skills

Team player

Education

MSEE/BSEE in Electrical Engineering or Computer Engineering

Job description

Responsibilities

1. Develop design requirements for an NPU based on system-level specifications.
2. Being part of modelling the performance of the NPU module and its data transaction throughput.
3. Microarchitecture design and RTL coding using Verilog / System Verilog HDL for various sub-blocks of the NPU.
4. Understanding the mathematics of different convolution operators including different arithmetic formats (fixed point and floating point)
5. Estimate, measure and optimize PPA (Performance / Power / Area) to meet key objectives and results.
6. Optimizing micro-architecture design for low power and area is required.
7. Work closely with verification engineers to ensure comprehensive testing and debug any issues.
8. Support integration into the overall system, conducting design checks, and addressing lint/timing/CDC issues.
9. Collaborate with software teams to assist in compiler and toolchain development and their debugging.
10. Produce clear and concise design documentation.

Requirements

1. 5+ years of digital design with at least 2 to 3 years of SoC design experience is preferred.
2. At least one cycle of NPU design completion experience is required.
3. Hands on experience in digital design is a must.
4. Experience in microarchitecture design, and RTL coding with Verilog/ System-Verilog.
5. Experience in synthesis, with analysis of power, timing and area.
6. Disciplined, quality-minded, and highly driven for excellence.
7. Excellent team player and good communication skills.
8. MSEE/BSEE in Electrical Engineering or Computer Engineering.
9. Understanding of convolution operator and number system is required.
10. Candidates with relevant experiences would be offered as Senior, taking on higher responsibilities.
11. Experience in UVM verification methodology is a plus.
12. A plus to have SoC design experience.
13. Experience with optimizing micro-architectures for low-power and low-area is a plus.
14. Knowledge in deep learning algorithms such as CNN / Transformer is a plus.
15. Experience with past design experience with NPU / GPU / DSP design is a plus.
16. Experience with ARM or RISC-V processor systems is a plus.
17. Passionate and strong in general programming is a plus.