Senior Low-Power Embedded Memory IP Engineer

Cognitive Design Technology Pvt Ltd; Singapore; On-site; SGD 90,000 - 180,000; Full time

Job summary

Cognitive Design Technology, founded in 2007, is a leading technology solution provider with focus on Embedded Systems, Semiconductor, CAD, MEMS and Nanotechnology. We seek an experienced Memory Design Engineer to work on architecture, design, compiler development, characterization, and silicon validation of embedded SRAM and Register File IPs for ultra-low-power SoCs.

You will collaborate with architecture, physical design, product engineering, foundry, EDA vendors, and silicon validation teams

Qualifications

• Bachelor's, Master's, or PhD in Electrical Engineering, Electronics, or related discipline.
• Experience developing embedded SRAM or Register File IP for advanced 12nm FINFET technologies and below.
• Hands-on experience with SRAM compiler development and configurable memory generation.

Responsibilities

• Design ultra-low power embedded SRAM and Register File IPs for advanced SoC products.
• Develop and enhance SRAM compiler architectures supporting multiple memory configurations, banking schemes and redundancy options.
• Design and optimize memory peripheral circuits such as sense amplifiers, write drivers, decoders, word-line drivers, pre-charge circuits, Read/write assist circuits, redundancy and repair logic
• Optimize memory designs for Area, Performance, Leakage power, Dynamic power, yield and manufacturability. Correlate simulation and characterization results with silicon measurements and production test data.
• Analyze low-voltage failure mechanisms including read disturb, write failure, read/write margins, retention failures and process variation effects
• Drive memory yield improvement through silicon debug, characterization analysis, and design optimization.
• Develop automation scripts using Python, Tcl, or Perl to improve compiler generation, characterization efficiency, regression, and design productivity.
• Collaborate with Memory architecture teams, Physical design, Timing and STA teams, DFT/BIST engineers, Product and test engineering, Foundry partners and EDA vendors
• Support memory IP integration into SoC products from architecture through production release.
• Document methodologies, design guidelines, characterization results, and silicon learnings.

Skills

SRAM architecture

Compiler design

Memory circuit design

Low-voltage SRAM

Python scripting

Tcl scripting

Perl scripting

Cadence tools

Education

Bachelor's/Master's/PhD in Electrical Engineering

Tools

Cadence Virtuoso

Spectre

HSPICE

Cadence Liberate MX

Monte Carlo simulations

Job description

Cognitive Design Technology, founded in 2007, is a leading technology solution provider with focus on Embedded Systems, Semiconductor, CAD, MEMS and Nanotechnology. We seek an experienced Memory Design Engineer to work on architecture, design, compiler development, characterization, and silicon validation of embedded SRAM and Register File IPs for ultra-low-power SoCs.

You will collaborate with architecture, physical design, product engineering, foundry, EDA vendors, and silicon validation teams