Senior IC Layout Engineer – Memory & I/O

Broadcom Singapore Pte Ltd; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Broadcom Singapore Pte Ltd is seeking a Staff Layout Engineer for its Library Group within the Central Engineering Group. The role focuses on IC layout for memory, I/O, and standard cells, with emphasis on advanced submicron processes.

You will apply layout guidelines, perform floor-planning, and ensure timely, quality layout and verification. Analog experience is a plus and relocation to Singapore is required.

Qualifications

• 8+ years of IC layout experience in submicron CMOS processes.
• Strong memory, I/O, and standard cell layout experience.
• Proficiency with Cadence tools and CALIBRE/Hercules.
• Experience in digital layout; analog layout is a plus.

Responsibilities

• IC Layout.
• Understand and apply layout guidelines (standard cells, I/O memories), new process rules and other technical requirements; schedule layout floor-planning.
• Complete quality layout and verification within planned schedule (without supervision for experienced engineer).
• Adapt quickly to new methodologies; communicate well with the library team.

Skills

IC Layout

Memory layout

Cadence layout

Cadence schematic capture

CALIBRE verification

Hercules verification

Floor-planning

Hierarchy layout

Memory compiler

SKILL scripting

Lead or train a team

Tools

Cadence Virtuoso

CALIBRE

Hercules verification tools

Job description

Broadcom Singapore Pte Ltd is seeking a Staff Layout Engineer for its Library Group within the Central Engineering Group. The role focuses on IC layout for memory, I/O, and standard cells, with emphasis on advanced submicron processes.

You will apply layout guidelines, perform floor-planning, and ensure timely, quality layout and verification. Analog experience is a plus and relocation to Singapore is required.