Staff Layout Engineer

Broadcom Inc.; Singapore; On-site; SGD 150,000 - 210,000; Full time

Job summary

Broadcom Inc. in Singapore is seeking a Staff Layout Engineer to develop and verify complex IC layouts for memory, I/O and standard cells. The role requires deep experience with Cadence layout and schematic capture, CALIBRE and Hercules verification, and submicron process knowledge.

You will lead layout efforts, collaborate across teams, and help mature layout methodologies while potentially guiding junior engineers. Willingness to relocate to Singapore is required.

Qualifications

• 8+ years of IC layout experience
• Cadence layout & schematic capture proficiency
• CALIBRE & Hercules verification tools experience
• Strong memory, standard cell, I/O layout experience; analog layout a plus

Responsibilities

• Understand and apply all layout guidelines for standard cells, IO and memories
• Schedule timeline and perform layout floor-planning
• Complete quality layout and verification within the planned schedule
• Lead or train junior engineers and communicate effectively within the library team

Skills

Memory layout design

Cadence layout

Cadence schematic capture

CALIBRE & Hercules

Digital memory I/O layout

Analog layout

Floor-planning

Leadership

SKILL scripting

Tools

Cadence Virtuoso XL/VXL/EXL

CALIBRE verification tools

Job description

## Staff Layout EngineerApply: Singapore-Yishun: Full time: Posted Yesterday: R027299**Please Note:****1. If you are a first time user, please create your candidate login account before you apply for a job. (Click Sign In > Create Account)****2. If you already have a Candidate Account, please Sign-In before you apply.**## **Job Description:****Staff Layout Engineer**Job descriptions and the level of expertise:The descriptions are for layout engineers for our Library Group. Library Group is a part of Central Engineering Group.In Library Group, we focus on circuit design for memory, I/O (Input/Output), and Standard Cells. **Requirements:*****IC Layout***Strong layout knowledge with a minimum of 8 years of experienceSkills include Cadence layout, Cadence schematic capture, using CALIBRE & Hercules verification tools.Strong layout knowledge in submicron processes, e.g. 16nm, 7nm, 5nm,2nm ,A14 and belowExperienced in digital (standard cell, memory, I/O) layoutExperienced in analog layout is also a plus**Job description:*****IC Layout***Responsible to understand and apply all necessary layout guidelines (standard cells, I/O memories), new process rules and other technical requirements for quality layout Schedule time-line & layout floor-planningComplete quality layout and verification within planned schedule (without supervision for experienced engineer)Get up to speed quickly for new methodologies, open to new ideas and communicate well with others in the library team **Skill Set (Mem)*** **Strong experience in memory layout design and physical verifications, including LVS, DRC, ERC, Antenna, and Electro Migration in CMOS processes.*** **Experienced in Cadence Layout tools VIRTUOSO (XL,VXL or EXL), and CALIBRE verification tools.*** **Good experience in Floor-planning, hierarchy layout and chip integration.*** **Experience in memory compiler will be a plus.*** **Knowledge of Script Programming and SKILL Programming would be a plus.*** **Able to lead or train a team of junior engineers*** **Good knowledge of memory layout topology.*** **Ability to lead new technology reviews to compile documentation of layout methodology, layout flow and guidelines.*** **Self-reliant, with the ability to work independently as well as in a team.*** **Good leadership quality in project management.** **Re-location*** ## Must be available to re-locate to Singapore immediately. **Broadcom is proud to be an equal opportunity employer. We will consider qualified applicants without regard to race, color, creed, religion, sex, sexual orientation, national origin, citizenship, disability status, medical condition, pregnancy, protected veteran status or any other characteristic protected by federal, state, or local law. We will also consider qualified applicants with arrest and conviction records consistent with local law.**