Senior IC Layout Engineer - Memory & I/O

Seoulstart; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Broadcom Singapore is seeking a Staff Layout Engineer to contribute to library and circuit design for memory, I/O, and standard cells. You will apply layout guidelines, manage floor-plans, and ensure high-quality layout and verification using Cadence tools, CALIBRE, and Hercules across 16nm to 2nm processes.

The role emphasizes strong layout expertise in digital and analog areas, with a focus on memory and I/O layouts, and a track record of on-time delivery in a fast-paced environment.

Qualifications

• 8+ years IC Layout experience.
• Experience with standard cells, I/O, memories.
• Cadence tools for layout and schematic capture.
• CALIBRE & Hercules verification tool experience.
• Experience with submicron nodes (16nm–2nm).
• Analog layout experience is a plus.

Responsibilities

• Understand and apply layout guidelines for standard cells, I/O memories, and new process rules.
• Plan schedules and layout floor-plans.
• Complete quality layout and verification for designs in memory, I/O, and standard cells.

Skills

Cadence layout

Cadence schematic capture

CALIBRE

Hercules verification

Digital layout

Analog layout

Submicron processes (16nm,7nm,5nm,2nm)

Tools

CALIBRE

Hercules

Job description

Broadcom Singapore is seeking a Staff Layout Engineer to contribute to library and circuit design for memory, I/O, and standard cells. You will apply layout guidelines, manage floor-plans, and ensure high-quality layout and verification using Cadence tools, CALIBRE, and Hercules across 16nm to 2nm processes.

The role emphasizes strong layout expertise in digital and analog areas, with a focus on memory and I/O layouts, and a track record of on-time delivery in a fast-paced environment.