Senior IC Design Engineer: RTL-to-GDS Full-Flow (7–2nm)

Broadcom, Inc.; Singapore; Presencial; SGD 120.000 - 180.000; Jornada completa

Descripción de la vacante

Broadcom Singapore is seeking a skilled IC design engineer to develop high-performance 7nm/5nm/3nm/2nm gate ICs. You will use both commercial and in-house EDA tools to drive RTL to GDS, covering placement, clock tree synthesis, routing, and verification across multiple nodes.

The role requires at least 5 years of relevant experience, strong UNIX/Linux and scripting (tcl, bash) skills, and a solid grasp of back-end flows.

Formación

• Degree, Masters or PhD in Electrical/Electronics/Computer engineering.
• Minimum of 5 years or more experience in a relevant field.
• Proficiency in UNIX/Linux and scripting languages, e.g. tcl, bash.
• Some knowledge of front end design and synthesis is advantageous.

Responsabilidades

• Utilize commercial and in-house EDA tools for the design and implementation of 100 ~ 400 million gate integrated circuits in 7nm/5nm/3nm/2nm process technologies.
• Able to handle a full RTL to GDS or Gates to GDS flow, inclusive of all construction stages (e.g. Placement, clock tree synthesis, detailed routing, physical verification, formal verification and timing analysis).
• Some knowledge of front end design and synthesis is advantageous.

Conocimientos

RTL to GDS flow

UNIX/Linux

Scripting (tcl/bash)

Educación

Electrical/Electronics/Computer Engineering

Herramientas

Synopsys

Cadence

Siemens

Descripción del empleo

Broadcom Singapore is seeking a skilled IC design engineer to develop high-performance 7nm/5nm/3nm/2nm gate ICs. You will use both commercial and in-house EDA tools to drive RTL to GDS, covering placement, clock tree synthesis, routing, and verification across multiple nodes.

The role requires at least 5 years of relevant experience, strong UNIX/Linux and scripting (tcl, bash) skills, and a solid grasp of back-end flows.