Senior ASIC Physical Design Engineer: RTL to GDS, 2nm-5nm

Broadcom Singapore Pte Ltd; Singapore; On-site; SGD 180,000 - 300,000; Full time

Job summary

Broadcom Singapore Pte Ltd is seeking an experienced Senior IC Design Engineer to drive RTL to GDS flows across 7nm/5nm/3nm/2nm nodes. You will leverage your 8+ years in IC/SoC design to deliver robust designs and ensure timing closure with advanced EDA tools.

The role requires strong UNIX/Linux scripting and deep knowledge of GPU/CPU/DSP architectures, plus hands-on experience with Synopsys, Cadence, and Siemens toolchains.

Qualifications

• 8+ years of experience in IC/SoC design or related field.
• Experience with RTL to GDS flow and physical verification.
• Strong knowledge of 7nm/5nm/3nm/2nm process technologies.

Responsibilities

• Handle RTL to GDS flow including synthesis, placement, routing and timing analysis.
• Apply depth of GPU/CPU/DSP architecture knowledge to physical design.

Skills

RTL to GDS flow

UNIX/Linux scripting

GPU/CPU/DSP architecture

Education

Master's or PhD in Electrical/Electronics/Computer engineering

Tools

Synopsys

Cadence

Siemens

Job description

Broadcom Singapore Pte Ltd is seeking an experienced Senior IC Design Engineer to drive RTL to GDS flows across 7nm/5nm/3nm/2nm nodes. You will leverage your 8+ years in IC/SoC design to deliver robust designs and ensure timing closure with advanced EDA tools.

The role requires strong UNIX/Linux scripting and deep knowledge of GPU/CPU/DSP architectures, plus hands-on experience with Synopsys, Cadence, and Siemens toolchains.