Senior IC Design Engineer — RTL to GDS for 2-7nm, 400–800M gates

Broadcom Singapore Pte Ltd; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Broadcom Singapore Pte Ltd is seeking an experienced IC design engineer to contribute to the design and implementation of cutting-edge 400–800 million gate integrated circuits across 7nm/5nm/3nm/2nm process technologies in Singapore. You will work with leading EDA tools and collaborate on full RTL-to-GDS workflows, including placement, clock tree synthesis, routing, and timing analysis.

The role requires a strong background in electrical/electronics/computer engineering and at least 5 years in a

Qualifications

• Degree, Masters or PhD in Electrical/Electronics/Computer engineering.
• Minimum 5 years of experience in a relevant field.
• Experience with RTL design concepts is preferred.

Responsibilities

• Utilize commercial and in-house EDA tools for design and implementation of 400~800 million gate ICs in 7nm/5nm/3nm/2nm process technologies.
• Handle full RTL to GDS flow including placement, clock tree synthesis, detailed routing, physical verification, formal verification and timing analysis.
• Proficiency in UNIX/Linux and scripting languages (tcl, bash, python).

Skills

Unix/Linux

tcl scripting

bash scripting

Python scripting

RTL design concepts

Education

Degree in Electrical/Electronics/Computer engineering

Tools

Synopsys

Cadence

Siemens

Job description

Broadcom Singapore Pte Ltd is seeking an experienced IC design engineer to contribute to the design and implementation of cutting-edge 400–800 million gate integrated circuits across 7nm/5nm/3nm/2nm process technologies in Singapore. You will work with leading EDA tools and collaborate on full RTL-to-GDS workflows, including placement, clock tree synthesis, routing, and timing analysis.

The role requires a strong background in electrical/electronics/computer engineering and at least 5 years in a