Senior Engineer, Device Characterization & Electrical Test

SSMC; Singapore; On-site; SGD 90,000 - 120,000; Full time

Job summary

SSMC, a joint venture between NXP and TSMC, in Singapore, is seeking a Senior Engineer for Characterization & Electrical Test to join Technology Development. You will lead device characterization and WAT activities, shaping production readiness.

The role requires strong CMOS/Bipolar knowledge, experience with WAT/bench tools, and collaboration with process integration and reliability teams. A background in semiconductor physics and independent working style is essential.

Qualifications

• Bachelor/Master in semiconductor, electronics, electrical, physics or material engineering.
• Strong knowledge of semiconductor device physics and WAT/characterization.
• Able to work independently with minimal supervision and collaborate across cultures.

Responsibilities

• Perform CMOS/Bipolar device characterization measurements on WAT testers and bench tools.
• Set up WAT program for NTOs and optimize tester and prober recipes for production.
• Interpret characterization data and work with process integration engineers to improve devices.
• Assist in reliability measurements and interpret results.
• Support adherence to automotive test requirements and WPH calculations.

Skills

CMOS device knowledge

Bipolar device knowledge

Statistics / Six Sigma

WAT program setup

WAT tester / prober setup

Device characterization measurements

Process collaboration

Reliability measurements setup

Automotive test requirements

WAT operations

Wafers per hour calculations

Education

Bachelor/Master in semiconductor/electronics/electrical/Physics/Material engineering

Job description

SSMC, a joint venture between NXP and TSMC, in Singapore, is seeking a Senior Engineer for Characterization & Electrical Test to join Technology Development. You will lead device characterization and WAT activities, shaping production readiness.

The role requires strong CMOS/Bipolar knowledge, experience with WAT/bench tools, and collaboration with process integration and reliability teams. A background in semiconductor physics and independent working style is essential.