Product Reliability Engineer - AI-Driven HBM & Innovation

Micron Technology, Inc.; Singapore; On-site; SGD 120,000 - 180,000; Full time

Job summary

Micron Technology, Inc. in Singapore is seeking an Engineer for Product Engineering focused on Media Health Reliability and HBM integration. You will define and execute reliability test plans, work with Quality to gate pools, and drive risk mitigation across the product lifecycle.

The role emphasizes data analysis, CMOS/DRAM familiarity, and collaboration with Fab, HBM teams, and system groups. A strong engineering background and mentorship mindset are required.

Qualifications

• Bachelor’s or Master’s degree in Electrical and Electronics Engineering or related field.
• Experience in semiconductor devices, circuit design, or product validation is a plus.
• Exposure to data analysis, statistics, and scripting tools such as Python or JMP.

Responsibilities

• Define and develop reliability stress, test flows and test plans covering product reliability.
• Define qualification plan with Global Quality and drive qualification gating issue resolution.
• Drive down Extrinsic and Intrinsic DPM through optimized test flows and strategies.
• Debug and identify root causes of Qual and RMA device issues using EFA and PFA techniques.
• Provide recommendations for new process conversions to reduce cost and improve yield for HVM.
• Promote innovation and manage risk with cross-functional teams including Fab and Quality/Reliability.
• Mentor others and develop project management and technical decision making within the team.
• Collaborate with cross-functional teams to ship end products.
• Identify AI use cases for reliability qualifications and work with partners to implement.

Skills

Reliability testing

Data analysis

Python

JMP

Team collaboration

Education

Electrical Eng degree

Tools

CMOS tech

DRAM architecture

Python

JMP

Job description

Micron Technology, Inc. in Singapore is seeking an Engineer for Product Engineering focused on Media Health Reliability and HBM integration. You will define and execute reliability test plans, work with Quality to gate pools, and drive risk mitigation across the product lifecycle.

The role emphasizes data analysis, CMOS/DRAM familiarity, and collaboration with Fab, HBM teams, and system groups. A strong engineering background and mentorship mindset are required.